/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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*
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* (C) Copyright TOSHIBA CORPORATION 2007
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*/
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#ifndef __TXX9_NDFMC_H
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#define __TXX9_NDFMC_H
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#define NDFMC_PLAT_FLAG_USE_BSPRT 0x01
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#define NDFMC_PLAT_FLAG_NO_RSTR 0x02
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#define NDFMC_PLAT_FLAG_HOLDADD 0x04
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#define NDFMC_PLAT_FLAG_DUMMYWRITE 0x08
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struct txx9ndfmc_platform_data {
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unsigned int shift;
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unsigned int gbus_clock;
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unsigned int hold; /* hold time in nanosecond */
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unsigned int spw; /* strobe pulse width in nanosecond */
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unsigned int flags;
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unsigned char ch_mask; /* available channel bitmask */
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unsigned char wp_mask; /* write-protect bitmask */
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unsigned char wide_mask; /* 16bit-nand bitmask */
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};
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void txx9_ndfmc_init(unsigned long baseaddr,
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const struct txx9ndfmc_platform_data *plat_data);
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#endif /* __TXX9_NDFMC_H */
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