/*
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* Copyright (c) 2011, 2012, Qualcomm Atheros Communications Inc.
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* Copyright (c) 2014, I2SE GmbH
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*
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* Permission to use, copy, modify, and/or distribute this software
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* for any purpose with or without fee is hereby granted, provided
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* that the above copyright notice and this permission notice appear
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* in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
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* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL
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* THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
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* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT,
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* NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
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* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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/* Qualcomm Atheros SPI register definition.
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*
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* This module is designed to define the Qualcomm Atheros SPI register
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* placeholders;
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*/
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#ifndef _QCA_SPI_H
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#define _QCA_SPI_H
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#include <linux/netdevice.h>
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#include <linux/sched.h>
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#include <linux/skbuff.h>
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#include <linux/spi/spi.h>
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#include <linux/types.h>
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#include "qca_7k_common.h"
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#define QCASPI_DRV_VERSION "0.2.7-i"
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#define QCASPI_DRV_NAME "qcaspi"
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#define QCASPI_GOOD_SIGNATURE 0xAA55
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#define TX_RING_MAX_LEN 10
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#define TX_RING_MIN_LEN 2
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/* sync related constants */
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#define QCASPI_SYNC_UNKNOWN 0
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#define QCASPI_SYNC_RESET 1
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#define QCASPI_SYNC_READY 2
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#define QCASPI_RESET_TIMEOUT 10
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/* sync events */
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#define QCASPI_EVENT_UPDATE 0
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#define QCASPI_EVENT_CPUON 1
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struct tx_ring {
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struct sk_buff *skb[TX_RING_MAX_LEN];
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u16 head;
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u16 tail;
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u16 size;
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u16 count;
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};
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struct qcaspi_stats {
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u64 trig_reset;
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u64 device_reset;
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u64 reset_timeout;
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u64 read_err;
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u64 write_err;
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u64 read_buf_err;
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u64 write_buf_err;
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u64 out_of_mem;
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u64 write_buf_miss;
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u64 ring_full;
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u64 spi_err;
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u64 write_verify_failed;
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u64 buf_avail_err;
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};
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struct qcaspi {
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struct net_device *net_dev;
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struct spi_device *spi_dev;
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struct task_struct *spi_thread;
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struct tx_ring txr;
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struct qcaspi_stats stats;
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u8 *rx_buffer;
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u32 buffer_size;
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u8 sync;
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struct qcafrm_handle frm_handle;
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struct sk_buff *rx_skb;
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unsigned int intr_req;
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unsigned int intr_svc;
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u16 reset_count;
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#ifdef CONFIG_DEBUG_FS
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struct dentry *device_root;
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#endif
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/* user configurable options */
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u32 clkspeed;
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u8 legacy_mode;
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u16 burst_len;
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};
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#endif /* _QCA_SPI_H */
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