/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#ifndef __PHYDMPATHDIV_H__
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#define __PHYDMPATHDIV_H__
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#ifdef CONFIG_PATH_DIVERSITY
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/* @2019.03.07 open resp tx path h2c only for 1ss status*/
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#define PATHDIV_VERSION "4.4"
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#if (RTL8192F_SUPPORT || RTL8822B_SUPPORT || RTL8822C_SUPPORT ||\
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RTL8812F_SUPPORT || RTL8197G_SUPPORT)
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#define PHYDM_CONFIG_PATH_DIV_V2
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#endif
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#define USE_PATH_A_AS_DEFAULT_ANT /* @for 8814 dynamic TX path selection */
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#define NUM_RESET_DTP_PERIOD 5
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#define ANT_DECT_RSSI_TH 3
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#define PATH_A 1
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#define PATH_B 2
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#define PATH_C 3
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#define PATH_D 4
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#define PHYDM_AUTO_PATH 0
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#define PHYDM_FIX_PATH 1
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#define NUM_CHOOSE2_FROM4 6
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#define NUM_CHOOSE3_FROM4 4
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enum phydm_dtp_state {
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PHYDM_DTP_INIT = 1,
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PHYDM_DTP_RUNNING_1
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};
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enum phydm_path_div_type {
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PHYDM_2R_PATH_DIV = 1,
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PHYDM_4R_PATH_DIV = 2
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};
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enum phydm_path_ctrl {
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TX_PATH_BY_REG = 0,
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TX_PATH_BY_DESC = 1,
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TX_PATH_CTRL_INIT
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};
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struct path_txdesc_ctrl {
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u8 ant_map_a : 2;
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u8 ant_map_b : 2;
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u8 ntx_map : 4;
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};
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struct _ODM_PATH_DIVERSITY_ {
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boolean stop_path_div; /*@Limit by enabled path number*/
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boolean path_div_in_progress;
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boolean cck_fix_path_en; /*@ BB Reg for Adv-Ctrl (or debug mode)*/
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boolean ofdm_fix_path_en; /*@ BB Reg for Adv-Ctrl (or debug mode)*/
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enum bb_path cck_fix_path_sel; /*@ BB Reg for Adv-Ctrl (or debug mode)*/
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enum bb_path ofdm_fix_path_sel;/*@ BB Reg for Adv-Ctrl (or debug mode)*/
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enum phydm_path_ctrl tx_path_ctrl;
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enum bb_path default_tx_path;
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enum bb_path path_sel[ODM_ASSOCIATE_ENTRY_NUM];
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u32 path_a_sum[ODM_ASSOCIATE_ENTRY_NUM];
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u32 path_b_sum[ODM_ASSOCIATE_ENTRY_NUM];
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u16 path_a_cnt[ODM_ASSOCIATE_ENTRY_NUM];
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u16 path_b_cnt[ODM_ASSOCIATE_ENTRY_NUM];
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u8 phydm_path_div_type;
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boolean force_update;
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#if RTL8814A_SUPPORT
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u32 path_a_sum_all;
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u32 path_b_sum_all;
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u32 path_c_sum_all;
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u32 path_d_sum_all;
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u32 path_a_cnt_all;
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u32 path_b_cnt_all;
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u32 path_c_cnt_all;
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u32 path_d_cnt_all;
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u8 dtp_period;
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boolean is_become_linked;
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boolean is_u3_mode;
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u8 num_tx_path;
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u8 default_path;
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u8 num_candidate;
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u8 ant_candidate_1;
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u8 ant_candidate_2;
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u8 ant_candidate_3;
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u8 phydm_dtp_state;
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u8 dtp_check_patha_counter;
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boolean fix_path_bfer;
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u8 search_space_2[NUM_CHOOSE2_FROM4];
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u8 search_space_3[NUM_CHOOSE3_FROM4];
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u8 pre_tx_path;
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u8 use_path_a_as_default_ant;
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boolean is_path_a_exist;
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#endif
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};
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void phydm_set_tx_path_by_bb_reg(void *dm_void, enum bb_path tx_path_sel_1ss);
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void phydm_get_tx_path_txdesc_jgr3(void *dm_void, u8 macid,
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struct path_txdesc_ctrl *desc);
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void phydm_c2h_dtp_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len);
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void phydm_tx_path_diversity_init(void *dm_void);
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void phydm_tx_path_diversity(void *dm_void);
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void phydm_process_rssi_for_path_div(void *dm_void, void *phy_info_void,
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void *pkt_info_void);
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void phydm_pathdiv_debug(void *dm_void, char input[][16], u32 *_used,
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char *output, u32 *_out_len);
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#endif /* @#ifdef CONFIG_PATH_DIVERSITY */
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#endif /* @#ifndef __PHYDMPATHDIV_H__ */
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