/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#ifndef __PHYDMCCX_H__
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#define __PHYDMCCX_H__
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/* 2021.03.10 Add 8814C flag*/
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#define CCX_VERSION "4.9"
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/* @1 ============================================================
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* 1 Definition
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* 1 ============================================================
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*/
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#define CCX_EN 1
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#define MAX_ENV_MNTR_TIME 8 /*second*/
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#define MS_TO_US 1000
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#define MS_TO_4US_RATIO 250
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#define CCA_CAP 14
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/*CLM*/
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#define CLM_MAX_REPORT_TIME 10
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#define CLM_PERIOD_MAX 65535
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/*NHM*/
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#define NHM_PERIOD_MAX 65534
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#define NHM_TH_NUM 11 /*threshold number of NHM*/
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#define NHM_RPT_NUM 12
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#define NHM_IC_NOISE_TH 60 /*60/2 - 10 = 20 = -80 dBm*/
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#define NHM_RPT_MAX 255
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#ifdef NHM_DYM_PW_TH_SUPPORT
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#define DYM_PWTH_CCA_CAP 24
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#endif
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#define IGI_2_NHM_TH(igi) ((igi) << 1)/*NHM/FAHM threshold = IGI * 2*/
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#define NTH_TH_2_RSSI(th) ((th >> 1) - 10)
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/*FAHM*/
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#define FAHM_INCLU_FA BIT(0)
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#define FAHM_INCLU_CRC_OK BIT(1)
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#define FAHM_INCLU_CRC_ERR BIT(2)
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#define FAHM_PERIOD_MAX 65534
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#define FAHM_TH_NUM 11 /*threshold number of FAHM*/
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#define FAHM_RPT_NUM 12
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/*IFS-CLM*/
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#define IFS_CLM_PERIOD_MAX 65535
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#define IFS_CLM_NUM 4
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/*EDCCA-CLM*/
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#define EDCCA_CLM_PERIOD 65535
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#define NHM_SUCCESS BIT(0)
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#define CLM_SUCCESS BIT(1)
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#define FAHM_SUCCESS BIT(2)
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#define IFS_CLM_SUCCESS BIT(3)
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#define EDCCA_CLM_SUCCESS BIT(4)
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#define ENV_MNTR_FAIL 0xff
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/* @1 ============================================================
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* 1 enumrate
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* 1 ============================================================
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*/
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enum phydm_clm_level {
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CLM_RELEASE = 0,
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CLM_LV_1 = 1, /* @Low Priority function */
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CLM_LV_2 = 2, /* @Middle Priority function */
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CLM_LV_3 = 3, /* @High priority function (ex: Check hang function) */
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CLM_LV_4 = 4, /* @Debug function (the highest priority) */
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CLM_MAX_NUM = 5
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};
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enum phydm_nhm_level {
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NHM_RELEASE = 0,
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NHM_LV_1 = 1, /* @Low Priority function */
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NHM_LV_2 = 2, /* @Middle Priority function */
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NHM_LV_3 = 3, /* @High priority function (ex: Check hang function) */
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NHM_LV_4 = 4, /* @Debug function (the highest priority) */
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NHM_MAX_NUM = 5
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};
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enum phydm_fahm_level {
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FAHM_RELEASE = 0,
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FAHM_LV_1 = 1, /* Low Priority function */
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FAHM_LV_2 = 2, /* Middle Priority function */
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FAHM_LV_3 = 3, /* High priority function (ex: Check hang function) */
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FAHM_LV_4 = 4, /* Debug function (the highest priority) */
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FAHM_MAX_NUM = 5
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};
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enum phydm_ifs_clm_level {
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IFS_CLM_RELEASE = 0,
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IFS_CLM_LV_1 = 1, /* @Low Priority function */
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IFS_CLM_LV_2 = 2, /* @Middle Priority function */
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IFS_CLM_LV_3 = 3, /* @High priority function (ex: Check hang function) */
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IFS_CLM_LV_4 = 4, /* @Debug function (the highest priority) */
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IFS_CLM_MAX_NUM = 5
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};
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enum phydm_edcca_clm_level {
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EDCCA_CLM_RELEASE = 0,
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EDCCA_CLM_LV_1 = 1, /* @Low Priority function */
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EDCCA_CLM_LV_2 = 2, /* @Middle Priority function */
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EDCCA_CLM_LV_3 = 3, /* @High priority function (ex: Check hang function) */
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EDCCA_CLM_LV_4 = 4, /* @Debug function (the highest priority) */
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EDCCA_CLM_MAX_NUM = 5
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};
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enum nhm_divider_opt_all {
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NHM_CNT_ALL = 0, /*nhm SUM report <= 255*/
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NHM_VALID = 1, /*nhm SUM report = 255*/
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NHM_CNT_INIT
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};
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enum nhm_setting {
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SET_NHM_SETTING,
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STORE_NHM_SETTING,
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RESTORE_NHM_SETTING
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};
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enum nhm_option_cca_all {
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NHM_EXCLUDE_CCA = 0,
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NHM_INCLUDE_CCA = 1,
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NHM_CCA_INIT
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};
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enum nhm_option_txon_all {
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NHM_EXCLUDE_TXON = 0,
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NHM_INCLUDE_TXON = 1,
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NHM_TXON_INIT
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};
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enum nhm_application {
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NHM_BACKGROUND = 0,/*@default*/
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NHM_ACS = 1,
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IEEE_11K_HIGH = 2,
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IEEE_11K_LOW = 3,
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INTEL_XBOX = 4,
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NHM_DBG = 5, /*@manual trigger*/
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};
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enum clm_application {
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CLM_BACKGROUND = 0,/*@default*/
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CLM_ACS = 1,
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};
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enum fahm_application {
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FAHM_BACKGROUND = 0,/*default*/
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FAHM_ACS = 1,
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FAHM_DBG = 2, /*manual trigger*/
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};
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enum ifs_clm_application {
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IFS_CLM_BACKGROUND = 0,/*default*/
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IFS_CLM_ACS = 1,
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IFS_CLM_HP_TAS = 2,
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IFS_CLM_DBG = 3,
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};
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enum clm_monitor_mode {
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CLM_DRIVER_MNTR = 1,
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CLM_FW_MNTR = 2
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};
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enum phydm_ifs_clm_unit {
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IFS_CLM_4 = 0, /*4us*/
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IFS_CLM_8 = 1, /*8us*/
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IFS_CLM_12 = 2, /*12us*/
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IFS_CLM_16 = 3, /*16us*/
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IFS_CLM_INIT
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};
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enum edcca_clm_application {
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EDCCA_CLM_BACKGROUND = 0,/*@default*/
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EDCCA_CLM_ACS = 1,
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EDCCA_CLM_DBG = 2,
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};
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/* @1 ============================================================
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* 1 structure
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* 1 ============================================================
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*/
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struct env_trig_rpt {
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u8 nhm_rpt_stamp;
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u8 clm_rpt_stamp;
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};
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struct env_mntr_rpt {
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u8 nhm_ratio;
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u8 nhm_env_ratio; /*exclude nhm_r[0] above -80dBm or first cluster under -80dBm*/
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u8 nhm_result[NHM_RPT_NUM];
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u8 clm_ratio;
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u8 nhm_rpt_stamp;
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u8 clm_rpt_stamp;
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u8 nhm_noise_pwr; /*including r[0]~r[10]*/
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u8 nhm_pwr; /*including r[0]~r[11]*/
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};
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struct enhance_mntr_trig_rpt {
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u8 nhm_rpt_stamp;
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u8 clm_rpt_stamp;
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u8 fahm_rpt_stamp;
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u8 ifs_clm_rpt_stamp;
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};
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struct enhance_mntr_rpt {
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u8 nhm_ratio;
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u8 nhm_env_ratio; /*exclude nhm_r[0] above -80dBm or first cluster under -80dBm*/
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u8 nhm_result[NHM_RPT_NUM];
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u8 clm_ratio;
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u8 nhm_rpt_stamp;
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u8 clm_rpt_stamp;
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u8 nhm_noise_pwr; /*including r[0]~r[10]*/
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u8 nhm_pwr; /*including r[0]~r[11]*/
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u16 fahm_result[NHM_RPT_NUM];
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u8 fahm_rpt_stamp;
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u8 fahm_pwr;
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u8 fahm_ratio;
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u8 fahm_denom_ratio;
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u8 fahm_inclu_cck;
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u8 ifs_clm_rpt_stamp;
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u8 ifs_clm_tx_ratio;
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u8 ifs_clm_edcca_excl_cca_ratio;
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u8 ifs_clm_cck_fa_ratio;
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u8 ifs_clm_cck_cca_excl_fa_ratio;
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u8 ifs_clm_ofdm_fa_ratio;
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u8 ifs_clm_ofdm_cca_excl_fa_ratio;
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};
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struct nhm_para_info {
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enum nhm_option_txon_all incld_txon; /*@Include TX on*/
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enum nhm_option_cca_all incld_cca; /*@Include CCA*/
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enum nhm_divider_opt_all div_opt; /*@divider option*/
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enum nhm_application nhm_app;
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enum phydm_nhm_level nhm_lv;
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u16 mntr_time; /*@0~262 unit ms*/
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boolean en_1db_mode;
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u8 nhm_th0_manual; /* for 1-db mode*/
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};
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struct clm_para_info {
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enum clm_application clm_app;
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enum phydm_clm_level clm_lv;
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u16 mntr_time; /*@0~262 unit ms*/
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};
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struct fahm_para_info {
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enum fahm_application app;
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enum phydm_fahm_level lv;
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u16 mntr_time; /*0~262 unit ms*/
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u8 numer_opt;
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u8 denom_opt;
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boolean en_1db_mode;
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u8 th0_manual;/* for 1-db mode*/
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};
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struct ifs_clm_para_info {
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enum ifs_clm_application ifs_clm_app;
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enum phydm_ifs_clm_level ifs_clm_lv;
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enum phydm_ifs_clm_unit ifs_clm_ctrl_unit; /*unit*/
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u16 mntr_time; /*ms*/
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boolean ifs_clm_th_en[IFS_CLM_NUM];
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u16 ifs_clm_th_low[IFS_CLM_NUM];
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u16 ifs_clm_th_high[IFS_CLM_NUM];
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s16 th_shift;
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};
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struct edcca_clm_para_info {
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enum edcca_clm_application edcca_clm_app;
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enum phydm_edcca_clm_level edcca_clm_lv;
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};
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struct ccx_info {
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u32 nhm_trigger_time;
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u32 clm_trigger_time;
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u32 fahm_trigger_time;
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u32 ifs_clm_trigger_time;
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u32 edcca_clm_trigger_time;
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u64 start_time; /*@monitor for the test duration*/
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u8 ccx_watchdog_result;
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#ifdef NHM_SUPPORT
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enum nhm_application nhm_app;
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enum nhm_option_txon_all nhm_include_txon;
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enum nhm_option_cca_all nhm_include_cca;
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enum nhm_divider_opt_all nhm_divider_opt;
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/*Report*/
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u8 nhm_th[NHM_TH_NUM];
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u8 nhm_result[NHM_RPT_NUM];
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u8 nhm_wgt[NHM_RPT_NUM];
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u16 nhm_period; /* @4us per unit */
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u8 nhm_igi;
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u8 nhm_manual_ctrl;
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u8 nhm_ratio; /*@1% per nuit, it means the interference igi can't overcome.*/
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u8 nhm_env_ratio; /*exclude nhm_r[0] above -80dBm or first cluster under -80dBm*/
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u8 nhm_rpt_sum;
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u16 nhm_duration; /*@Real time of NHM_VALID */
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u8 nhm_set_lv;
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boolean nhm_ongoing;
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u8 nhm_rpt_stamp;
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u8 nhm_level; /*including r[0]~r[10]*/
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u8 nhm_level_valid;
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u8 nhm_pwr; /*including r[0]~r[11]*/
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#ifdef NHM_DYM_PW_TH_SUPPORT
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boolean nhm_dym_pw_th_en;
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boolean dym_pwth_manual_ctrl;
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u8 pw_th_rf20_ori;
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u8 pw_th_rf20_cur;
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u8 nhm_pw_th_max;
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u8 nhm_period_decre;
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u8 nhm_sl_pw_th;
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#endif
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#endif
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#ifdef CLM_SUPPORT
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enum clm_application clm_app;
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u8 clm_manual_ctrl;
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u8 clm_set_lv;
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boolean clm_ongoing;
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u16 clm_period; /* @4us per unit */
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u16 clm_result;
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u8 clm_ratio;
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u32 clm_fw_result_acc;
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u8 clm_fw_result_cnt;
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enum clm_monitor_mode clm_mntr_mode;
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u8 clm_rpt_stamp;
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#endif
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#ifdef FAHM_SUPPORT
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enum fahm_application fahm_app;
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boolean fahm_ongoing;
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u8 fahm_numer_opt;
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u8 fahm_denom_opt;
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boolean fahm_inclu_cck;
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u8 fahm_th[NHM_TH_NUM];
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u16 fahm_result[NHM_RPT_NUM];
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u16 fahm_result_sum;
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u16 fahm_denom_result;
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u16 fahm_period; /*unit: 4us*/
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u8 fahm_igi;
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u8 fahm_manual_ctrl;
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u8 fahm_set_lv;
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u8 fahm_rpt_stamp;
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u8 fahm_pwr; /*including r[0]~r[11]*/
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u8 fahm_ratio;
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u8 fahm_denom_ratio;
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#endif
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#ifdef IFS_CLM_SUPPORT
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enum ifs_clm_application ifs_clm_app;
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/*Control*/
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enum phydm_ifs_clm_unit ifs_clm_ctrl_unit; /*4,8,12,16us per unit*/
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u16 ifs_clm_period;
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boolean ifs_clm_th_en[IFS_CLM_NUM];
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u16 ifs_clm_th_low[IFS_CLM_NUM];
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u16 ifs_clm_th_high[IFS_CLM_NUM];
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/*Flow control*/
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u8 ifs_clm_set_lv;
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u8 ifs_clm_manual_ctrl;
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boolean ifs_clm_ongoing;
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/*Report*/
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u8 ifs_clm_rpt_stamp;
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u16 ifs_clm_tx;
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u16 ifs_clm_edcca_excl_cca;
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u16 ifs_clm_ofdmfa;
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u16 ifs_clm_ofdmcca_excl_fa;
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u16 ifs_clm_cckfa;
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u16 ifs_clm_cckcca_excl_fa;
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u8 ifs_clm_his[IFS_CLM_NUM]; /*trx_neg_edge to CCA/FA posedge per times*/
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u16 ifs_clm_total_cca;
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u16 ifs_clm_avg[IFS_CLM_NUM]; /*4,8,12,16us per unit*/
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u16 ifs_clm_avg_cca[IFS_CLM_NUM]; /*4,8,12,16us per unit*/
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u8 ifs_clm_tx_ratio;
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u8 ifs_clm_edcca_excl_cca_ratio;
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u8 ifs_clm_cck_fa_ratio;
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u8 ifs_clm_cck_cca_excl_fa_ratio;
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u8 ifs_clm_ofdm_fa_ratio;
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u8 ifs_clm_ofdm_cca_excl_fa_ratio;
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#endif
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#ifdef EDCCA_CLM_SUPPORT
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enum edcca_clm_application edcca_clm_app;
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u8 edcca_clm_manual_ctrl;
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u8 edcca_clm_set_lv;
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boolean edcca_clm_ongoing;
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u16 edcca_clm_result;
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u8 edcca_clm_ratio;
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u8 edcca_clm_rpt_stamp;
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#endif
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};
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/* @1 ============================================================
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* 1 Function Prototype
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* 1 ============================================================
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*/
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#ifdef FAHM_SUPPORT
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void phydm_fahm_init(void *dm_void);
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void phydm_fahm_dbg(void *dm_void, char input[][16], u32 *_used, char *output,
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u32 *_out_len);
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#endif
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#ifdef NHM_SUPPORT
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void phydm_nhm_dbg(void *dm_void, char input[][16], u32 *_used, char *output,
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u32 *_out_len);
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u8 phydm_get_igi(void *dm_void, enum bb_path path);
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#endif
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#ifdef CLM_SUPPORT
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void phydm_clm_c2h_report_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len);
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void phydm_clm_dbg(void *dm_void, char input[][16], u32 *_used, char *output,
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u32 *_out_len);
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#endif
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u8 phydm_env_mntr_trigger(void *dm_void, struct nhm_para_info *nhm_para,
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struct clm_para_info *clm_para,
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struct env_trig_rpt *rpt);
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u8 phydm_env_mntr_result(void *dm_void, struct env_mntr_rpt *rpt);
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void phydm_env_mntr_dbg(void *dm_void, char input[][16], u32 *_used,
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char *output, u32 *_out_len);
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#ifdef IFS_CLM_SUPPORT
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void phydm_ifs_clm_dbg(void *dm_void, char input[][16], u32 *_used,
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char *output, u32 *_out_len);
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#endif
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u8 phydm_enhance_mntr_trigger(void *dm_void,
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struct nhm_para_info *nhm_para,
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struct clm_para_info *clm_para,
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struct fahm_para_info *fahm_para,
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struct ifs_clm_para_info *ifs_clm_para,
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struct enhance_mntr_trig_rpt *trig_rpt);
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u8 phydm_enhance_mntr_result(void *dm_void, struct enhance_mntr_rpt *rpt);
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void phydm_enhance_mntr_dbg(void *dm_void, char input[][16], u32 *_used,
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char *output, u32 *_out_len);
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#ifdef EDCCA_CLM_SUPPORT
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void phydm_edcca_clm_dbg(void *dm_void, char input[][16], u32 *_used,
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char *output, u32 *_out_len);
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#endif
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void phydm_env_mntr_result_watchdog(void *dm_void);
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void phydm_env_mntr_set_watchdog(void *dm_void);
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u8 phydm_env_mntr_get_802_11_k_rsni(void *dm_void, s8 rcpi, s8 anpi);
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void phydm_env_monitor_init(void *dm_void);
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#endif
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