/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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/*************************************************************
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* include files
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************************************************************/
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#include "mp_precomp.h"
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#include "phydm_precomp.h"
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#ifdef PHYDM_AUTO_DEGBUG
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void phydm_check_hang_reset(
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void *dm_void)
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{
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struct dm_struct *dm = (struct dm_struct *)dm_void;
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struct phydm_auto_dbg_struct *atd_t = &dm->auto_dbg_table;
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atd_t->dbg_step = 0;
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atd_t->auto_dbg_type = AUTO_DBG_STOP;
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phydm_pause_dm_watchdog(dm, PHYDM_RESUME);
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dm->debug_components &= (~ODM_COMP_API);
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}
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void phydm_check_hang_init(
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void *dm_void)
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{
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struct dm_struct *dm = (struct dm_struct *)dm_void;
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struct phydm_auto_dbg_struct *atd_t = &dm->auto_dbg_table;
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atd_t->dbg_step = 0;
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atd_t->auto_dbg_type = AUTO_DBG_STOP;
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phydm_pause_dm_watchdog(dm, PHYDM_RESUME);
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}
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#if (ODM_IC_11N_SERIES_SUPPORT == 1)
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void phydm_auto_check_hang_engine_n(
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void *dm_void)
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{
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struct dm_struct *dm = (struct dm_struct *)dm_void;
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struct phydm_auto_dbg_struct *atd_t = &dm->auto_dbg_table;
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struct n_dbgport_803 dbgport_803 = {0};
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u32 value32_tmp = 0, value32_tmp_2 = 0;
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u8 i;
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u32 curr_dbg_port_val[DBGPORT_CHK_NUM] = {0, 0, 0, 0, 0, 0};
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u16 curr_ofdm_t_cnt;
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u16 curr_ofdm_r_cnt;
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u16 curr_cck_t_cnt;
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u16 curr_cck_r_cnt;
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u16 curr_ofdm_crc_error_cnt;
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u16 curr_cck_crc_error_cnt;
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u16 diff_ofdm_t_cnt;
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u16 diff_ofdm_r_cnt;
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u16 diff_cck_t_cnt;
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u16 diff_cck_r_cnt;
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u16 diff_ofdm_crc_error_cnt;
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u16 diff_cck_crc_error_cnt;
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u8 rf_mode;
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if (atd_t->auto_dbg_type == AUTO_DBG_STOP)
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return;
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if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
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phydm_check_hang_reset(dm);
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return;
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}
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if (atd_t->dbg_step == 0) {
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pr_debug("dbg_step=0\n\n");
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/*Reset all packet counter*/
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odm_set_bb_reg(dm, R_0xf14, BIT(16), 1);
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odm_set_bb_reg(dm, R_0xf14, BIT(16), 0);
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} else if (atd_t->dbg_step == 1) {
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pr_debug("dbg_step=1\n\n");
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/*Check packet counter Register*/
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atd_t->ofdm_t_cnt = (u16)odm_get_bb_reg(dm, R_0x9cc, MASKHWORD);
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atd_t->ofdm_r_cnt = (u16)odm_get_bb_reg(dm, R_0xf94, MASKLWORD);
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atd_t->ofdm_crc_error_cnt = (u16)odm_get_bb_reg(dm, R_0xf94,
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MASKHWORD);
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atd_t->cck_t_cnt = (u16)odm_get_bb_reg(dm, R_0x9d0, MASKHWORD);
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atd_t->cck_r_cnt = (u16)odm_get_bb_reg(dm, R_0xfa0, MASKHWORD);
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atd_t->cck_crc_error_cnt = (u16)odm_get_bb_reg(dm, R_0xf84,
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0x3fff);
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/*Check Debug Port*/
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for (i = 0; i < DBGPORT_CHK_NUM; i++) {
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if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3,
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(u32)atd_t->dbg_port_table[i])
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) {
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atd_t->dbg_port_val[i] =
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phydm_get_bb_dbg_port_val(dm);
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phydm_release_bb_dbg_port(dm);
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}
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}
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} else if (atd_t->dbg_step == 2) {
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pr_debug("dbg_step=2\n\n");
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/*Check packet counter Register*/
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curr_ofdm_t_cnt = (u16)odm_get_bb_reg(dm, R_0x9cc, MASKHWORD);
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curr_ofdm_r_cnt = (u16)odm_get_bb_reg(dm, R_0xf94, MASKLWORD);
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curr_ofdm_crc_error_cnt = (u16)odm_get_bb_reg(dm, R_0xf94,
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MASKHWORD);
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curr_cck_t_cnt = (u16)odm_get_bb_reg(dm, R_0x9d0, MASKHWORD);
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curr_cck_r_cnt = (u16)odm_get_bb_reg(dm, R_0xfa0, MASKHWORD);
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curr_cck_crc_error_cnt = (u16)odm_get_bb_reg(dm, R_0xf84,
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0x3fff);
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/*Check Debug Port*/
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for (i = 0; i < DBGPORT_CHK_NUM; i++) {
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if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3,
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(u32)atd_t->dbg_port_table[i])
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) {
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curr_dbg_port_val[i] =
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phydm_get_bb_dbg_port_val(dm);
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phydm_release_bb_dbg_port(dm);
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}
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}
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/*=== Make check hang decision ===============================*/
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pr_debug("Check Hang Decision\n\n");
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/* ----- Check RF Register -----------------------------------*/
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for (i = 0; i < dm->num_rf_path; i++) {
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rf_mode = (u8)odm_get_rf_reg(dm, i, RF_0x0, 0xf0000);
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pr_debug("RF0x0[%d] = 0x%x\n", i, rf_mode);
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if (rf_mode > 3) {
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pr_debug("Incorrect RF mode\n");
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pr_debug("ReasonCode:RHN-1\n");
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}
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}
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value32_tmp = odm_get_rf_reg(dm, 0, RF_0xb0, 0xf0000);
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if (dm->support_ic_type == ODM_RTL8188E) {
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if (value32_tmp != 0xff8c8) {
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pr_debug("ReasonCode:RHN-3\n");
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}
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}
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/* ----- Check BB Register ----------------------------------*/
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/*BB mode table*/
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value32_tmp = odm_get_bb_reg(dm, R_0x824, 0xe);
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value32_tmp_2 = odm_get_bb_reg(dm, R_0x82c, 0xe);
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pr_debug("BB TX mode table {A, B}= {%d, %d}\n",
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value32_tmp, value32_tmp_2);
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if (value32_tmp > 3 || value32_tmp_2 > 3) {
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pr_debug("ReasonCode:RHN-2\n");
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}
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value32_tmp = odm_get_bb_reg(dm, R_0x824, 0x700000);
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value32_tmp_2 = odm_get_bb_reg(dm, R_0x82c, 0x700000);
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pr_debug("BB RX mode table {A, B}= {%d, %d}\n", value32_tmp,
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value32_tmp_2);
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if (value32_tmp > 3 || value32_tmp_2 > 3) {
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pr_debug("ReasonCode:RHN-2\n");
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}
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/*BB HW Block*/
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value32_tmp = odm_get_bb_reg(dm, R_0x800, MASKDWORD);
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if (!(value32_tmp & BIT(24))) {
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pr_debug("Reg0x800[24] = 0, CCK BLK is disabled\n");
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pr_debug("ReasonCode: THN-3\n");
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}
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if (!(value32_tmp & BIT(25))) {
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pr_debug("Reg0x800[24] = 0, OFDM BLK is disabled\n");
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pr_debug("ReasonCode:THN-3\n");
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}
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/*BB Continue TX*/
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value32_tmp = odm_get_bb_reg(dm, R_0xd00, 0x70000000);
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pr_debug("Continue TX=%d\n", value32_tmp);
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if (value32_tmp != 0) {
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pr_debug("ReasonCode: THN-4\n");
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}
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/* ----- Check Packet Counter --------------------------------*/
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diff_ofdm_t_cnt = curr_ofdm_t_cnt - atd_t->ofdm_t_cnt;
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diff_ofdm_r_cnt = curr_ofdm_r_cnt - atd_t->ofdm_r_cnt;
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diff_ofdm_crc_error_cnt = curr_ofdm_crc_error_cnt -
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atd_t->ofdm_crc_error_cnt;
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diff_cck_t_cnt = curr_cck_t_cnt - atd_t->cck_t_cnt;
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diff_cck_r_cnt = curr_cck_r_cnt - atd_t->cck_r_cnt;
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diff_cck_crc_error_cnt = curr_cck_crc_error_cnt -
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atd_t->cck_crc_error_cnt;
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pr_debug("OFDM[t=0~1] {TX, RX, CRC_error} = {%d, %d, %d}\n",
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atd_t->ofdm_t_cnt, atd_t->ofdm_r_cnt,
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atd_t->ofdm_crc_error_cnt);
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pr_debug("OFDM[t=1~2] {TX, RX, CRC_error} = {%d, %d, %d}\n",
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curr_ofdm_t_cnt, curr_ofdm_r_cnt,
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curr_ofdm_crc_error_cnt);
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pr_debug("OFDM_diff {TX, RX, CRC_error} = {%d, %d, %d}\n",
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diff_ofdm_t_cnt, diff_ofdm_r_cnt,
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diff_ofdm_crc_error_cnt);
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pr_debug("CCK[t=0~1] {TX, RX, CRC_error} = {%d, %d, %d}\n",
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atd_t->cck_t_cnt, atd_t->cck_r_cnt,
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atd_t->cck_crc_error_cnt);
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pr_debug("CCK[t=1~2] {TX, RX, CRC_error} = {%d, %d, %d}\n",
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curr_cck_t_cnt, curr_cck_r_cnt,
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curr_cck_crc_error_cnt);
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pr_debug("CCK_diff {TX, RX, CRC_error} = {%d, %d, %d}\n",
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diff_cck_t_cnt, diff_cck_r_cnt,
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diff_cck_crc_error_cnt);
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/* ----- Check Dbg Port --------------------------------*/
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for (i = 0; i < DBGPORT_CHK_NUM; i++) {
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pr_debug("Dbg_port=((0x%x))\n",
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atd_t->dbg_port_table[i]);
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pr_debug("Val{pre, curr}={0x%x, 0x%x}\n",
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atd_t->dbg_port_val[i], curr_dbg_port_val[i]);
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if (atd_t->dbg_port_table[i] == 0) {
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if (atd_t->dbg_port_val[i] ==
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curr_dbg_port_val[i]) {
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pr_debug("BB state hang\n");
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pr_debug("ReasonCode:\n");
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}
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} else if (atd_t->dbg_port_table[i] == 0x803) {
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if (atd_t->dbg_port_val[i] ==
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curr_dbg_port_val[i]) {
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/* dbgport_803 = */
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/* (struct n_dbgport_803 ) */
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/* (atd_t->dbg_port_val[i]); */
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odm_move_memory(dm, &dbgport_803,
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&atd_t->dbg_port_val[i],
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sizeof(struct n_dbgport_803));
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pr_debug("RSTB{BB, GLB, OFDM}={%d, %d,%d}\n",
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dbgport_803.bb_rst_b,
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dbgport_803.glb_rst_b,
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dbgport_803.ofdm_rst_b);
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pr_debug("{ofdm_tx_en, cck_tx_en, phy_tx_on}={%d, %d, %d}\n",
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dbgport_803.ofdm_tx_en,
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dbgport_803.cck_tx_en,
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dbgport_803.phy_tx_on);
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pr_debug("CCA_PP{OFDM, CCK}={%d, %d}\n",
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dbgport_803.ofdm_cca_pp,
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dbgport_803.cck_cca_pp);
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if (dbgport_803.phy_tx_on)
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pr_debug("Maybe TX Hang\n");
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else if (dbgport_803.ofdm_cca_pp ||
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dbgport_803.cck_cca_pp)
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pr_debug("Maybe RX Hang\n");
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}
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} else if (atd_t->dbg_port_table[i] == 0x208) {
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if ((atd_t->dbg_port_val[i] & BIT(30)) &&
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(curr_dbg_port_val[i] & BIT(30))) {
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pr_debug("EDCCA Pause TX\n");
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pr_debug("ReasonCode: THN-2\n");
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}
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} else if (atd_t->dbg_port_table[i] == 0xab0) {
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/* atd_t->dbg_port_val[i] & 0xffffff == 0 */
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/* curr_dbg_port_val[i] & 0xffffff == 0 */
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if (((atd_t->dbg_port_val[i] &
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MASK24BITS) == 0) ||
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((curr_dbg_port_val[i] &
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MASK24BITS) == 0)) {
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pr_debug("Wrong L-SIG formate\n");
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pr_debug("ReasonCode: THN-1\n");
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}
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}
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}
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phydm_check_hang_reset(dm);
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}
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atd_t->dbg_step++;
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}
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void phydm_bb_auto_check_hang_start_n(
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void *dm_void,
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u32 *_used,
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char *output,
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u32 *_out_len)
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{
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u32 value32 = 0;
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struct dm_struct *dm = (struct dm_struct *)dm_void;
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struct phydm_auto_dbg_struct *atd_t = &dm->auto_dbg_table;
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u32 used = *_used;
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u32 out_len = *_out_len;
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if (dm->support_ic_type & ODM_IC_11AC_SERIES)
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return;
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PDM_SNPF(out_len, used, output + used, out_len - used,
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"PHYDM auto check hang (N-series) is started, Please check the system log\n");
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dm->debug_components |= ODM_COMP_API;
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atd_t->auto_dbg_type = AUTO_DBG_CHECK_HANG;
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atd_t->dbg_step = 0;
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phydm_pause_dm_watchdog(dm, PHYDM_PAUSE);
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*_used = used;
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*_out_len = out_len;
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}
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void phydm_dbg_port_dump_n(void *dm_void, u32 *_used, char *output,
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u32 *_out_len)
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{
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u32 value32 = 0;
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struct dm_struct *dm = (struct dm_struct *)dm_void;
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u32 used = *_used;
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u32 out_len = *_out_len;
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if (dm->support_ic_type & ODM_IC_11AC_SERIES)
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return;
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PDM_SNPF(out_len, used, output + used, out_len - used,
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"not support now\n");
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*_used = used;
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*_out_len = out_len;
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}
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#endif
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#if (ODM_IC_11AC_SERIES_SUPPORT == 1)
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void phydm_dbg_port_dump_ac(void *dm_void, u32 *_used, char *output,
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u32 *_out_len)
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{
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u32 value32 = 0;
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struct dm_struct *dm = (struct dm_struct *)dm_void;
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u32 used = *_used;
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u32 out_len = *_out_len;
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if (dm->support_ic_type & ODM_IC_11N_SERIES)
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return;
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value32 = odm_get_bb_reg(dm, R_0xf80, MASKDWORD);
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PDM_SNPF(out_len, used, output + used, out_len - used,
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"\r\n %-35s = 0x%x", "rptreg of sc/bw/ht/...", value32);
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if (dm->support_ic_type & ODM_RTL8822B)
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odm_set_bb_reg(dm, R_0x198c, BIT(2) | BIT(1) | BIT(0), 7);
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/* dbg_port = basic state machine */
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{
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odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x000);
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value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
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PDM_SNPF(out_len, used, output + used, out_len - used,
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"\r\n %-35s = 0x%x", "0x8fc", value32);
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value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
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PDM_SNPF(out_len, used, output + used, out_len - used,
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"\r\n %-35s = 0x%x", "basic state machine", value32);
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}
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/* dbg_port = state machine */
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{
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odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x007);
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value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
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PDM_SNPF(out_len, used, output + used, out_len - used,
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"\r\n %-35s = 0x%x", "0x8fc", value32);
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value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
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PDM_SNPF(out_len, used, output + used, out_len - used,
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"\r\n %-35s = 0x%x", "state machine", value32);
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}
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/* dbg_port = CCA-related*/
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{
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odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x204);
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value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
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PDM_SNPF(out_len, used, output + used, out_len - used,
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"\r\n %-35s = 0x%x", "0x8fc", value32);
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value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
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PDM_SNPF(out_len, used, output + used, out_len - used,
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"\r\n %-35s = 0x%x", "CCA-related", value32);
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}
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/* dbg_port = edcca/rxd*/
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{
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odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x278);
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value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
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PDM_SNPF(out_len, used, output + used, out_len - used,
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"\r\n %-35s = 0x%x", "0x8fc", value32);
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value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
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PDM_SNPF(out_len, used, output + used, out_len - used,
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"\r\n %-35s = 0x%x", "edcca/rxd", value32);
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}
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/* dbg_port = rx_state/mux_state/ADC_MASK_OFDM*/
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{
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odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x290);
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value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
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PDM_SNPF(out_len, used, output + used, out_len - used,
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"\r\n %-35s = 0x%x", "0x8fc", value32);
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value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
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PDM_SNPF(out_len, used, output + used, out_len - used,
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"\r\n %-35s = 0x%x",
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"rx_state/mux_state/ADC_MASK_OFDM", value32);
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}
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/* dbg_port = bf-related*/
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{
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odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x2B2);
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value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
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PDM_SNPF(out_len, used, output + used, out_len - used,
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"\r\n %-35s = 0x%x", "0x8fc", value32);
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value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
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PDM_SNPF(out_len, used, output + used, out_len - used,
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"\r\n %-35s = 0x%x", "bf-related", value32);
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}
|
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/* dbg_port = bf-related*/
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{
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odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x2B8);
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value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
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PDM_SNPF(out_len, used, output + used, out_len - used,
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"\r\n %-35s = 0x%x", "0x8fc", value32);
|
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value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
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PDM_SNPF(out_len, used, output + used, out_len - used,
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"\r\n %-35s = 0x%x", "bf-related", value32);
|
}
|
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/* dbg_port = txon/rxd*/
|
{
|
odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xA03);
|
value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
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PDM_SNPF(out_len, used, output + used, out_len - used,
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"\r\n %-35s = 0x%x", "0x8fc", value32);
|
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value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
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PDM_SNPF(out_len, used, output + used, out_len - used,
|
"\r\n %-35s = 0x%x", "txon/rxd", value32);
|
}
|
|
/* dbg_port = l_rate/l_length*/
|
{
|
odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xA0B);
|
value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
|
PDM_SNPF(out_len, used, output + used, out_len - used,
|
"\r\n %-35s = 0x%x", "0x8fc", value32);
|
|
value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
|
PDM_SNPF(out_len, used, output + used, out_len - used,
|
"\r\n %-35s = 0x%x", "l_rate/l_length", value32);
|
}
|
|
/* dbg_port = rxd/rxd_hit*/
|
{
|
odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xA0D);
|
value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
|
PDM_SNPF(out_len, used, output + used, out_len - used,
|
"\r\n %-35s = 0x%x", "0x8fc", value32);
|
|
value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
|
PDM_SNPF(out_len, used, output + used, out_len - used,
|
"\r\n %-35s = 0x%x", "rxd/rxd_hit", value32);
|
}
|
|
/* dbg_port = dis_cca*/
|
{
|
odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAA0);
|
value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
|
PDM_SNPF(out_len, used, output + used, out_len - used,
|
"\r\n %-35s = 0x%x", "0x8fc", value32);
|
|
value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
|
PDM_SNPF(out_len, used, output + used, out_len - used,
|
"\r\n %-35s = 0x%x", "dis_cca", value32);
|
}
|
|
/* dbg_port = tx*/
|
{
|
odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAB0);
|
value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
|
PDM_SNPF(out_len, used, output + used, out_len - used,
|
"\r\n %-35s = 0x%x", "0x8fc", value32);
|
|
value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
|
PDM_SNPF(out_len, used, output + used, out_len - used,
|
"\r\n %-35s = 0x%x", "tx", value32);
|
}
|
|
/* dbg_port = rx plcp*/
|
{
|
odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAD0);
|
value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
|
PDM_SNPF(out_len, used, output + used, out_len - used,
|
"\r\n %-35s = 0x%x", "0x8fc", value32);
|
|
value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
|
PDM_SNPF(out_len, used, output + used, out_len - used,
|
"\r\n %-35s = 0x%x", "rx plcp", value32);
|
|
odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAD1);
|
value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
|
PDM_SNPF(out_len, used, output + used, out_len - used,
|
"\r\n %-35s = 0x%x", "0x8fc", value32);
|
|
value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
|
PDM_SNPF(out_len, used, output + used, out_len - used,
|
"\r\n %-35s = 0x%x", "rx plcp", value32);
|
|
odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAD2);
|
value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
|
PDM_SNPF(out_len, used, output + used, out_len - used,
|
"\r\n %-35s = 0x%x", "0x8fc", value32);
|
|
value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
|
PDM_SNPF(out_len, used, output + used, out_len - used,
|
"\r\n %-35s = 0x%x", "rx plcp", value32);
|
|
odm_set_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0xAD3);
|
value32 = odm_get_bb_reg(dm, ODM_REG_DBG_RPT_11AC, MASKDWORD);
|
PDM_SNPF(out_len, used, output + used, out_len - used,
|
"\r\n %-35s = 0x%x", "0x8fc", value32);
|
|
value32 = odm_get_bb_reg(dm, ODM_REG_RPT_11AC, MASKDWORD);
|
PDM_SNPF(out_len, used, output + used, out_len - used,
|
"\r\n %-35s = 0x%x", "rx plcp", value32);
|
}
|
*_used = used;
|
*_out_len = out_len;
|
}
|
#endif
|
|
#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
|
void phydm_dbg_port_dump_jgr3(void *dm_void, u32 *_used, char *output,
|
u32 *_out_len)
|
{
|
struct dm_struct *dm = (struct dm_struct *)dm_void;
|
u32 used = *_used;
|
u32 out_len = *_out_len;
|
/*u32 dbg_port_idx_all[3] = {0x000, 0x001, 0x002};*/
|
u32 val = 0;
|
u32 dbg_port_idx = 0;
|
u32 i = 0;
|
|
if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES))
|
return;
|
|
PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
|
"%-17s = %s\n", "DbgPort index", "Value");
|
|
#if 0
|
/*0x000/0x001/0x002*/
|
for (i = 0; i < 3; i++) {
|
dbg_port_idx = dbg_port_idx_all[i];
|
if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, dbg_port_idx)) {
|
val = phydm_get_bb_dbg_port_val(dm);
|
PDM_SNPF(out_len, used, output + used, out_len - used,
|
"0x%-15x = 0x%x\n", dbg_port_idx, val);
|
phydm_release_bb_dbg_port(dm);
|
}
|
}
|
#endif
|
for (dbg_port_idx = 0x0; dbg_port_idx <= 0xfff; dbg_port_idx++) {
|
if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, dbg_port_idx)) {
|
val = phydm_get_bb_dbg_port_val(dm);
|
PDM_VAST_SNPF(out_len, used, output + used,
|
out_len - used,
|
"0x%-15x = 0x%x\n", dbg_port_idx, val);
|
phydm_release_bb_dbg_port(dm);
|
}
|
}
|
*_used = used;
|
*_out_len = out_len;
|
}
|
#endif
|
|
void phydm_dbg_port_dump(void *dm_void, u32 *_used, char *output, u32 *_out_len)
|
{
|
struct dm_struct *dm = (struct dm_struct *)dm_void;
|
u32 used = *_used;
|
u32 out_len = *_out_len;
|
|
PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
|
"------ BB debug port start ------\n");
|
|
switch (dm->ic_ip_series) {
|
#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
|
case PHYDM_IC_JGR3:
|
phydm_dbg_port_dump_jgr3(dm, &used, output, &out_len);
|
break;
|
#endif
|
|
#if (ODM_IC_11AC_SERIES_SUPPORT == 1)
|
case PHYDM_IC_AC:
|
phydm_dbg_port_dump_ac(dm, &used, output, &out_len);
|
break;
|
#endif
|
|
#if (ODM_IC_11N_SERIES_SUPPORT == 1)
|
case PHYDM_IC_N:
|
phydm_dbg_port_dump_n(dm, &used, output, &out_len);
|
break;
|
#endif
|
|
default:
|
break;
|
}
|
*_used = used;
|
*_out_len = out_len;
|
}
|
|
void phydm_auto_dbg_console(
|
void *dm_void,
|
char input[][16],
|
u32 *_used,
|
char *output,
|
u32 *_out_len)
|
{
|
struct dm_struct *dm = (struct dm_struct *)dm_void;
|
char help[] = "-h";
|
u32 var1[10] = {0};
|
u32 used = *_used;
|
u32 out_len = *_out_len;
|
|
PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
|
|
if ((strcmp(input[1], help) == 0)) {
|
PDM_SNPF(out_len, used, output + used, out_len - used,
|
"hang: {1} {1:Show DbgPort, 2:Auto check hang}\n");
|
return;
|
} else if (var1[0] == 1) {
|
PHYDM_SSCANF(input[2], DCMD_DECIMAL, &var1[1]);
|
if (var1[1] == 1) {
|
phydm_dbg_port_dump(dm, &used, output, &out_len);
|
} else if (var1[1] == 2) {
|
if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
|
PDM_SNPF(out_len, used, output + used,
|
out_len - used, "Not support\n");
|
} else {
|
#if (ODM_IC_11N_SERIES_SUPPORT == 1)
|
phydm_bb_auto_check_hang_start_n(dm, &used,
|
output,
|
&out_len);
|
#else
|
PDM_SNPF(out_len, used, output + used,
|
out_len - used, "Not support\n");
|
#endif
|
}
|
}
|
}
|
|
*_used = used;
|
*_out_len = out_len;
|
}
|
|
void phydm_auto_dbg_engine(void *dm_void)
|
{
|
u32 value32 = 0;
|
|
struct dm_struct *dm = (struct dm_struct *)dm_void;
|
struct phydm_auto_dbg_struct *atd_t = &dm->auto_dbg_table;
|
|
if (atd_t->auto_dbg_type == AUTO_DBG_STOP)
|
return;
|
|
pr_debug("%s ======>\n", __func__);
|
|
if (atd_t->auto_dbg_type == AUTO_DBG_CHECK_HANG) {
|
if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
|
pr_debug("Not Support\n");
|
} else {
|
#if (ODM_IC_11N_SERIES_SUPPORT == 1)
|
phydm_auto_check_hang_engine_n(dm);
|
#else
|
pr_debug("Not Support\n");
|
#endif
|
}
|
|
} else if (atd_t->auto_dbg_type == AUTO_DBG_CHECK_RA) {
|
pr_debug("Not Support\n");
|
}
|
}
|
|
void phydm_auto_dbg_engine_init(void *dm_void)
|
{
|
struct dm_struct *dm = (struct dm_struct *)dm_void;
|
struct phydm_auto_dbg_struct *atd_t = &dm->auto_dbg_table;
|
u16 dbg_port_table[DBGPORT_CHK_NUM] = {0x0, 0x803, 0x208, 0xab0,
|
0xab1, 0xab2};
|
|
PHYDM_DBG(dm, ODM_COMP_API, "%s ======>\n", __func__);
|
|
odm_move_memory(dm, &atd_t->dbg_port_table[0],
|
&dbg_port_table[0], (DBGPORT_CHK_NUM * 2));
|
|
phydm_check_hang_init(dm);
|
}
|
#endif
|
