/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#ifndef __INC_ADCSMP_H
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#define __INC_ADCSMP_H
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#if (PHYDM_LA_MODE_SUPPORT)
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/* 2020.07.03 [8723F] Fix SD4 compile error*/
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#define DYNAMIC_LA_MODE "4.2"
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/* @1 ============================================================
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* 1 Definition
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* 1 ============================================================
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*/
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#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
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#if (RTL8197F_SUPPORT || RTL8198F_SUPPORT || RTL8197G_SUPPORT)
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#define PHYDM_COMPILE_LA_STORE_IN_IMEM
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#endif
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#endif
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#define PHYDM_LA_STORE_IN_IMEM_IC (ODM_RTL8197F | ODM_RTL8198F | ODM_RTL8197G)
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#define FULL_BUFF_MODE_SUPPORT (ODM_RTL8821C | ODM_RTL8195B | ODM_RTL8822C |\
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ODM_RTL8812F | ODM_RTL8814B | ODM_RTL8814C)
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/* @ ============================================================
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* enumrate
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* ============================================================
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*/
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enum la_dump_mode {
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LA_BB_ADC_DUMP = 0,
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LA_MAC_DBG_DUMP = 1
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};
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enum rt_adcsmp_trig_sel {
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PHYDM_ADC_BB_TRIG = 0,
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PHYDM_ADC_MAC_TRIG = 1,
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PHYDM_ADC_RF0_TRIG = 2,
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PHYDM_ADC_RF1_TRIG = 3,
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PHYDM_MAC_TRIG = 4
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};
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enum rt_adcsmp_trig_sig_sel {
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ADCSMP_TRIG_CRCOK = 0,
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ADCSMP_TRIG_CRCFAIL = 1,
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ADCSMP_TRIG_CCA = 2,
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ADCSMP_TRIG_REG = 3
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};
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enum rt_adcsmp_state {
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ADCSMP_STATE_IDLE = 0,
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ADCSMP_STATE_SET = 1,
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ADCSMP_STATE_QUERY = 2
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};
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enum la_buff_mode {
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ADCSMP_BUFF_HALF = 0,
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ADCSMP_BUFF_ALL = 1 /*Only use in MP Driver*/
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};
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/* @ ============================================================
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* structure
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* ============================================================
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*/
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struct rt_adcsmp_string {
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u32 *octet;
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u32 length;
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u32 buffer_size;
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u32 start_pos;
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u32 end_pos; /*@buf addr*/
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};
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#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
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struct la_adv_trig {
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boolean la_adv_bbtrigger_en;
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boolean la_ori_bb_dis;
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u8 la_and1_sel;
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u8 la_and1_val;
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boolean la_and1_inv;
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u8 la_and2_sel;
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u8 la_and2_val;
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boolean la_and2_inv;
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u8 la_and3_sel;
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u8 la_and3_val;
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boolean la_and3_inv;
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u32 la_and4_mask;
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u32 la_and4_bitmap;
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boolean la_and4_inv;
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};
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#endif
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struct rt_adcsmp {
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struct rt_adcsmp_string adc_smp_buf;
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enum rt_adcsmp_state adc_smp_state;
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enum la_buff_mode la_buff_mode;
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enum la_dump_mode la_dump_mode;
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u8 la_trig_mode;
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u32 la_trig_sig_sel;
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u8 la_dma_type;
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u32 la_trigger_time;
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/*@1.BB mode: Dbg port header sel, 2.MAC mode: for reference mask*/
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u32 la_mac_mask_or_hdr_sel;
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u32 la_dbg_port;
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u8 la_trigger_edge;
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u8 la_smp_rate;
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u32 la_count;
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u32 smp_number;
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u32 smp_number_max;
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u32 txff_page;
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boolean is_la_print;
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boolean en_fake_trig;
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#if (RTL8197F_SUPPORT)
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u32 backup_dma;
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#endif
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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u8 la_work_item_index;
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RT_WORK_ITEM adc_smp_work_item;
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RT_WORK_ITEM adc_smp_work_item_1;
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#endif
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#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
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struct la_adv_trig adv_trig_table;
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#endif
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};
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/* @ ============================================================
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* Function Prototype
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* ============================================================
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*/
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void phydm_la_set(void *dm_void);
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void phydm_la_cmd(void *dm_void, char input[][16], u32 *_used, char *output,
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u32 *_out_len);
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void phydm_la_stop(void *dm_void);
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void phydm_la_init(void *dm_void);
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void adc_smp_de_init(void *dm_void);
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#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
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void adc_smp_work_item_callback(void *context);
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#endif
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#endif
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#endif
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