/******************************************************************************
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*
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* Copyright(c) 2017 - 2019 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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******************************************************************************/
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#ifndef _HALMAC_STATE_MACHINE_H_
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#define _HALMAC_STATE_MACHINE_H_
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enum halmac_dlfw_state {
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HALMAC_DLFW_NONE = 0,
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HALMAC_DLFW_DONE = 1,
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HALMAC_GEN_INFO_SENT = 2,
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/* Data CPU firmware download framework */
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HALMAC_DLFW_INIT = 0x11,
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HALMAC_DLFW_START = 0x12,
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HALMAC_DLFW_CONF_READY = 0x13,
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HALMAC_DLFW_CPU_READY = 0x14,
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HALMAC_DLFW_MEM_READY = 0x15,
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HALMAC_DLFW_SW_READY = 0x16,
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HALMAC_DLFW_OFLD_READY = 0x17,
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HALMAC_DLFW_UNDEFINED = 0x7F,
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};
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enum halmac_gpio_cfg_state {
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HALMAC_GPIO_CFG_STATE_IDLE = 0,
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HALMAC_GPIO_CFG_STATE_BUSY = 1,
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HALMAC_GPIO_CFG_STATE_UNDEFINED = 0x7F,
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};
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enum halmac_rsvd_pg_state {
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HALMAC_RSVD_PG_STATE_IDLE = 0,
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HALMAC_RSVD_PG_STATE_BUSY = 1,
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HALMAC_RSVD_PG_STATE_UNDEFINED = 0x7F,
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};
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enum halmac_api_state {
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HALMAC_API_STATE_INIT = 0,
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HALMAC_API_STATE_HALT = 1,
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HALMAC_API_STATE_UNDEFINED = 0x7F,
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};
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enum halmac_cmd_construct_state {
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HALMAC_CMD_CNSTR_IDLE = 0,
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HALMAC_CMD_CNSTR_BUSY = 1,
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HALMAC_CMD_CNSTR_H2C_SENT = 2,
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HALMAC_CMD_CNSTR_CNSTR = 3,
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HALMAC_CMD_CNSTR_BUF_CLR = 4,
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HALMAC_CMD_CNSTR_UNDEFINED = 0x7F,
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};
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enum halmac_cmd_process_status {
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HALMAC_CMD_PROCESS_IDLE = 0x01, /* Init status */
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HALMAC_CMD_PROCESS_SENDING = 0x02, /* Wait ack */
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HALMAC_CMD_PROCESS_RCVD = 0x03, /* Rcvd ack */
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HALMAC_CMD_PROCESS_DONE = 0x04, /* Event done */
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HALMAC_CMD_PROCESS_ERROR = 0x05, /* Return code error */
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HALMAC_CMD_PROCESS_UNDEFINE = 0x7F,
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};
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enum halmac_mac_power {
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HALMAC_MAC_POWER_OFF = 0x0,
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HALMAC_MAC_POWER_ON = 0x1,
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HALMAC_MAC_POWER_UNDEFINE = 0x7F,
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};
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enum halmac_wlcpu_mode {
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HALMAC_WLCPU_ACTIVE = 0x0,
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HALMAC_WLCPU_ENTER_SLEEP = 0x1,
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HALMAC_WLCPU_SLEEP = 0x2,
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HALMAC_WLCPU_UNDEFINE = 0x7F,
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};
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struct halmac_efuse_state {
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enum halmac_cmd_construct_state cmd_cnstr_state;
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enum halmac_cmd_process_status proc_status;
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u8 fw_rc;
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u16 seq_num;
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};
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struct halmac_cfg_param_state {
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enum halmac_cmd_construct_state cmd_cnstr_state;
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enum halmac_cmd_process_status proc_status;
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u8 fw_rc;
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u16 seq_num;
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};
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struct halmac_scan_state {
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enum halmac_cmd_construct_state cmd_cnstr_state;
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enum halmac_cmd_process_status proc_status;
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u8 fw_rc;
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u16 seq_num;
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};
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struct halmac_update_pkt_state {
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enum halmac_cmd_process_status proc_status;
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u8 fw_rc;
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u16 seq_num;
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u8 used_page;
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};
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struct halmac_scan_pkt_state {
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enum halmac_cmd_process_status proc_status;
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u8 fw_rc;
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u16 seq_num;
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};
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struct halmac_drop_pkt_state {
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enum halmac_cmd_process_status proc_status;
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u8 fw_rc;
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u16 seq_num;
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};
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struct halmac_iqk_state {
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enum halmac_cmd_process_status proc_status;
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u8 fw_rc;
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u16 seq_num;
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};
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struct halmac_dpk_state {
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enum halmac_cmd_process_status proc_status;
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u16 data_size;
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u16 seg_size;
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u8 *data;
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u8 fw_rc;
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u16 seq_num;
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};
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struct halmac_pwr_tracking_state {
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enum halmac_cmd_process_status proc_status;
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u8 fw_rc;
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u16 seq_num;
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};
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struct halmac_psd_state {
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enum halmac_cmd_process_status proc_status;
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u16 data_size;
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u16 seg_size;
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u8 *data;
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u8 fw_rc;
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u16 seq_num;
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};
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struct halmac_fw_snding_state {
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enum halmac_cmd_construct_state cmd_cnstr_state;
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enum halmac_cmd_process_status proc_status;
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u8 fw_rc;
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u16 seq_num;
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};
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struct halmac_state {
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struct halmac_efuse_state efuse_state;
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struct halmac_cfg_param_state cfg_param_state;
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struct halmac_scan_state scan_state;
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struct halmac_update_pkt_state update_pkt_state;
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struct halmac_scan_pkt_state scan_pkt_state;
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struct halmac_drop_pkt_state drop_pkt_state;
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struct halmac_iqk_state iqk_state;
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struct halmac_dpk_state dpk_state;
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struct halmac_pwr_tracking_state pwr_trk_state;
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struct halmac_psd_state psd_state;
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struct halmac_fw_snding_state fw_snding_state;
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enum halmac_api_state api_state;
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enum halmac_mac_power mac_pwr;
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enum halmac_dlfw_state dlfw_state;
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enum halmac_wlcpu_mode wlcpu_mode;
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enum halmac_gpio_cfg_state gpio_cfg_state;
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enum halmac_rsvd_pg_state rsvd_pg_state;
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};
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#endif
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