/******************************************************************************
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*
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* Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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******************************************************************************/
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#include "halmac_pcie_88xx.h"
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#include "halmac_efuse_88xx.h"
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#if (HALMAC_88XX_SUPPORT && HALMAC_PCIE_SUPPORT)
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#if HALMAC_8822C_SUPPORT
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static enum halmac_ret_status
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low_pwr_patch(struct halmac_adapter *adapter)
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{
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u8 map = 0;
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struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
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if (adapter->chip_id != HALMAC_CHIP_ID_8822C)
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return HALMAC_RET_NOT_SUPPORT;
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if (read_wifi_phy_efuse_88xx(adapter, 0x1F9, 1, &map) !=
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HALMAC_RET_SUCCESS)
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return HALMAC_RET_EFUSE_R_FAIL;
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if (map & BIT(3)) {
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HALMAC_REG_W8_SET(REG_PMC_DBG_CTRL2,
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BIT_SYSON_DIS_PMCREG_WRMSK);
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HALMAC_REG_W8_SET(REG_HCI_BG_CTRL, BIT_FORCED_IB_EN);
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HALMAC_REG_W8_CLR(REG_PMC_DBG_CTRL2,
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BIT_SYSON_DIS_PMCREG_WRMSK);
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}
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return HALMAC_RET_SUCCESS;
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}
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#endif
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/**
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* init_pcie_cfg_88xx() - init PCIe
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* @adapter : the adapter of halmac
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* Author : KaiYuan Chang
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* Return : enum halmac_ret_status
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* More details of status code can be found in prototype document
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*/
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enum halmac_ret_status
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init_pcie_cfg_88xx(struct halmac_adapter *adapter)
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{
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#if HALMAC_8822C_SUPPORT
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struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
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if (adapter->chip_id == HALMAC_CHIP_ID_8822C) {
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if (adapter->chip_ver == HALMAC_CHIP_VER_D_CUT ||
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adapter->chip_ver == HALMAC_CHIP_VER_E_CUT ||
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adapter->chip_ver == HALMAC_CHIP_VER_F_CUT)
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/* defined after 8822C D CUT */
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HALMAC_REG_W8_SET(REG_HCI_MIX_CFG + 3, BIT(2));
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low_pwr_patch(adapter);
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}
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#endif
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return HALMAC_RET_SUCCESS;
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}
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/**
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* deinit_pcie_cfg_88xx() - deinit PCIE
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* @adapter : the adapter of halmac
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* Author : KaiYuan Chang
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* Return : enum halmac_ret_status
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* More details of status code can be found in prototype document
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*/
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enum halmac_ret_status
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deinit_pcie_cfg_88xx(struct halmac_adapter *adapter)
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{
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return HALMAC_RET_SUCCESS;
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}
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/**
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* cfg_pcie_rx_agg_88xx() - config rx aggregation
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* @adapter : the adapter of halmac
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* @halmac_rx_agg_mode
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* Author : KaiYuan Chang/Ivan Lin
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* Return : enum halmac_ret_status
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* More details of status code can be found in prototype document
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*/
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enum halmac_ret_status
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cfg_pcie_rx_agg_88xx(struct halmac_adapter *adapter,
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struct halmac_rxagg_cfg *cfg)
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{
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return HALMAC_RET_SUCCESS;
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}
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/**
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* reg_r8_pcie_88xx() - read 1byte register
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* @adapter : the adapter of halmac
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* @offset : register offset
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* Author : KaiYuan Chang/Ivan Lin
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* Return : enum halmac_ret_status
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* More details of status code can be found in prototype document
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*/
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u8
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reg_r8_pcie_88xx(struct halmac_adapter *adapter, u32 offset)
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{
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return PLTFM_REG_R8(offset);
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}
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/**
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* reg_w8_pcie_88xx() - write 1byte register
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* @adapter : the adapter of halmac
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* @offset : register offset
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* @value : register value
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* Author : KaiYuan Chang/Ivan Lin
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* Return : enum halmac_ret_status
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* More details of status code can be found in prototype document
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*/
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enum halmac_ret_status
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reg_w8_pcie_88xx(struct halmac_adapter *adapter, u32 offset, u8 value)
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{
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PLTFM_REG_W8(offset, value);
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return HALMAC_RET_SUCCESS;
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}
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/**
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* reg_r16_pcie_88xx() - read 2byte register
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* @adapter : the adapter of halmac
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* @offset : register offset
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* Author : KaiYuan Chang/Ivan Lin
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* Return : enum halmac_ret_status
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* More details of status code can be found in prototype document
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*/
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u16
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reg_r16_pcie_88xx(struct halmac_adapter *adapter, u32 offset)
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{
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return PLTFM_REG_R16(offset);
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}
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/**
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* reg_w16_pcie_88xx() - write 2byte register
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* @adapter : the adapter of halmac
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* @offset : register offset
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* @value : register value
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* Author : KaiYuan Chang/Ivan Lin
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* Return : enum halmac_ret_status
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* More details of status code can be found in prototype document
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*/
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enum halmac_ret_status
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reg_w16_pcie_88xx(struct halmac_adapter *adapter, u32 offset, u16 value)
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{
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PLTFM_REG_W16(offset, value);
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return HALMAC_RET_SUCCESS;
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}
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/**
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* reg_r32_pcie_88xx() - read 4byte register
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* @adapter : the adapter of halmac
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* @offset : register offset
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* Author : KaiYuan Chang/Ivan Lin
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* Return : enum halmac_ret_status
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* More details of status code can be found in prototype document
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*/
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u32
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reg_r32_pcie_88xx(struct halmac_adapter *adapter, u32 offset)
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{
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return PLTFM_REG_R32(offset);
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}
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/**
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* reg_w32_pcie_88xx() - write 4byte register
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* @adapter : the adapter of halmac
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* @offset : register offset
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* @value : register value
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* Author : KaiYuan Chang/Ivan Lin
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* Return : enum halmac_ret_status
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* More details of status code can be found in prototype document
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*/
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enum halmac_ret_status
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reg_w32_pcie_88xx(struct halmac_adapter *adapter, u32 offset, u32 value)
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{
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PLTFM_REG_W32(offset, value);
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return HALMAC_RET_SUCCESS;
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}
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/**
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* cfg_txagg_pcie_align_88xx() -config sdio bus tx agg alignment
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* @adapter : the adapter of halmac
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* @enable : function enable(1)/disable(0)
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* @align_size : sdio bus tx agg alignment size (2^n, n = 3~11)
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* Author : Soar Tu
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* Return : enum halmac_ret_status
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* More details of status code can be found in prototype document
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*/
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enum halmac_ret_status
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cfg_txagg_pcie_align_88xx(struct halmac_adapter *adapter, u8 enable,
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u16 align_size)
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{
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return HALMAC_RET_NOT_SUPPORT;
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}
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/**
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* tx_allowed_pcie_88xx() - check tx status
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* @adapter : the adapter of halmac
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* @buf : tx packet, include txdesc
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* @size : tx packet size, include txdesc
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* Author : Ivan Lin
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* Return : enum halmac_ret_status
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* More details of status code can be found in prototype document
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*/
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enum halmac_ret_status
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tx_allowed_pcie_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
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{
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return HALMAC_RET_NOT_SUPPORT;
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}
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/**
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* pcie_indirect_reg_r32_88xx() - read MAC reg by SDIO reg
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* @adapter : the adapter of halmac
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* @offset : register offset
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* Author : Soar
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* Return : enum halmac_ret_status
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* More details of status code can be found in prototype document
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*/
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u32
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pcie_indirect_reg_r32_88xx(struct halmac_adapter *adapter, u32 offset)
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{
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return 0xFFFFFFFF;
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}
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/**
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* pcie_reg_rn_88xx() - read n byte register
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* @adapter : the adapter of halmac
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* @offset : register offset
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* @size : register value size
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* @value : register value
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* Author : Soar
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* Return : enum halmac_ret_status
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* More details of status code can be found in prototype document
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*/
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enum halmac_ret_status
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pcie_reg_rn_88xx(struct halmac_adapter *adapter, u32 offset, u32 size,
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u8 *value)
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{
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return HALMAC_RET_NOT_SUPPORT;
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}
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/**
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* set_pcie_bulkout_num_88xx() - inform bulk-out num
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* @adapter : the adapter of halmac
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* @num : usb bulk-out number
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* Author : KaiYuan Chang
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* Return : enum halmac_ret_status
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* More details of status code can be found in prototype document
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*/
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enum halmac_ret_status
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set_pcie_bulkout_num_88xx(struct halmac_adapter *adapter, u8 num)
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{
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return HALMAC_RET_NOT_SUPPORT;
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}
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/**
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* get_pcie_tx_addr_88xx() - get CMD53 addr for the TX packet
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* @adapter : the adapter of halmac
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* @buf : tx packet, include txdesc
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* @size : tx packet size
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* @cmd53_addr : cmd53 addr value
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* Author : KaiYuan Chang/Ivan Lin
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* Return : enum halmac_ret_status
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* More details of status code can be found in prototype document
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*/
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enum halmac_ret_status
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get_pcie_tx_addr_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size,
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u32 *cmd53_addr)
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{
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return HALMAC_RET_NOT_SUPPORT;
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}
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/**
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* get_pcie_bulkout_id_88xx() - get bulk out id for the TX packet
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* @adapter : the adapter of halmac
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* @buf : tx packet, include txdesc
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* @size : tx packet size
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* @id : usb bulk-out id
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* Author : KaiYuan Chang
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* Return : enum halmac_ret_status
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* More details of status code can be found in prototype document
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*/
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enum halmac_ret_status
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get_pcie_bulkout_id_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size,
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u8 *id)
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{
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return HALMAC_RET_NOT_SUPPORT;
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}
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enum halmac_ret_status
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mdio_write_88xx(struct halmac_adapter *adapter, u8 addr, u16 data, u8 speed)
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{
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u8 tmp_u1b = 0;
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u32 cnt = 0;
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struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
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u8 real_addr = 0;
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HALMAC_REG_W16(REG_MDIO_V1, data);
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real_addr = (addr & 0x1F);
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HALMAC_REG_W8(REG_PCIE_MIX_CFG, real_addr);
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if (speed == HAL_INTF_PHY_PCIE_GEN1) {
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if (addr < 0x20)
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HALMAC_REG_W8(REG_PCIE_MIX_CFG + 3, 0x00);
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else
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HALMAC_REG_W8(REG_PCIE_MIX_CFG + 3, 0x01);
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} else if (speed == HAL_INTF_PHY_PCIE_GEN2) {
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if (addr < 0x20)
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HALMAC_REG_W8(REG_PCIE_MIX_CFG + 3, 0x02);
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else
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HALMAC_REG_W8(REG_PCIE_MIX_CFG + 3, 0x03);
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} else {
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PLTFM_MSG_ERR("[ERR]Error Speed !\n");
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}
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HALMAC_REG_W8_SET(REG_PCIE_MIX_CFG, BIT_MDIO_WFLAG_V1);
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tmp_u1b = HALMAC_REG_R8(REG_PCIE_MIX_CFG) & BIT_MDIO_WFLAG_V1;
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cnt = 20;
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while (tmp_u1b && (cnt != 0)) {
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PLTFM_DELAY_US(10);
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tmp_u1b = HALMAC_REG_R8(REG_PCIE_MIX_CFG) & BIT_MDIO_WFLAG_V1;
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cnt--;
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}
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if (tmp_u1b) {
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PLTFM_MSG_ERR("[ERR]MDIO write fail!\n");
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return HALMAC_RET_FAIL;
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}
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return HALMAC_RET_SUCCESS;
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}
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u16
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mdio_read_88xx(struct halmac_adapter *adapter, u8 addr, u8 speed)
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{
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u16 ret = 0;
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u8 tmp_u1b = 0;
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u32 cnt = 0;
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struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
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u8 real_addr = 0;
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real_addr = (addr & 0x1F);
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HALMAC_REG_W8(REG_PCIE_MIX_CFG, real_addr);
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if (speed == HAL_INTF_PHY_PCIE_GEN1) {
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if (addr < 0x20)
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HALMAC_REG_W8(REG_PCIE_MIX_CFG + 3, 0x00);
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else
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HALMAC_REG_W8(REG_PCIE_MIX_CFG + 3, 0x01);
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} else if (speed == HAL_INTF_PHY_PCIE_GEN2) {
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if (addr < 0x20)
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HALMAC_REG_W8(REG_PCIE_MIX_CFG + 3, 0x02);
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else
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HALMAC_REG_W8(REG_PCIE_MIX_CFG + 3, 0x03);
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} else {
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PLTFM_MSG_ERR("[ERR]Error Speed !\n");
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}
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HALMAC_REG_W8_SET(REG_PCIE_MIX_CFG, BIT_MDIO_RFLAG_V1);
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tmp_u1b = HALMAC_REG_R8(REG_PCIE_MIX_CFG) & BIT_MDIO_RFLAG_V1;
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cnt = 20;
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while (tmp_u1b && (cnt != 0)) {
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PLTFM_DELAY_US(10);
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tmp_u1b = HALMAC_REG_R8(REG_PCIE_MIX_CFG) & BIT_MDIO_RFLAG_V1;
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cnt--;
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}
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if (tmp_u1b) {
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ret = 0xFFFF;
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PLTFM_MSG_ERR("[ERR]MDIO read fail!\n");
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} else {
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ret = HALMAC_REG_R16(REG_MDIO_V1 + 2);
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PLTFM_MSG_TRACE("[TRACE]Value-R = %x\n", ret);
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}
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return ret;
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}
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enum halmac_ret_status
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dbi_w32_88xx(struct halmac_adapter *adapter, u16 addr, u32 data)
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{
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u8 tmp_u1b = 0;
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u32 cnt = 0;
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u16 write_addr = 0;
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struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
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HALMAC_REG_W32(REG_DBI_WDATA_V1, data);
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write_addr = ((addr & 0x0ffc) | (0x000F << 12));
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HALMAC_REG_W16(REG_DBI_FLAG_V1, write_addr);
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PLTFM_MSG_TRACE("[TRACE]Addr-W = %x\n", write_addr);
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HALMAC_REG_W8(REG_DBI_FLAG_V1 + 2, 0x01);
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tmp_u1b = HALMAC_REG_R8(REG_DBI_FLAG_V1 + 2);
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cnt = 20;
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while (tmp_u1b && (cnt != 0)) {
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PLTFM_DELAY_US(10);
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tmp_u1b = HALMAC_REG_R8(REG_DBI_FLAG_V1 + 2);
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cnt--;
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}
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if (tmp_u1b) {
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PLTFM_MSG_ERR("[ERR]DBI write fail!\n");
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return HALMAC_RET_FAIL;
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}
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return HALMAC_RET_SUCCESS;
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}
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u32
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dbi_r32_88xx(struct halmac_adapter *adapter, u16 addr)
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{
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u16 read_addr = addr & 0x0ffc;
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u8 tmp_u1b = 0;
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u32 cnt = 0;
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u32 ret = 0;
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struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
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HALMAC_REG_W16(REG_DBI_FLAG_V1, read_addr);
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HALMAC_REG_W8(REG_DBI_FLAG_V1 + 2, 0x2);
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tmp_u1b = HALMAC_REG_R8(REG_DBI_FLAG_V1 + 2);
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cnt = 20;
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while (tmp_u1b && (cnt != 0)) {
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PLTFM_DELAY_US(10);
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tmp_u1b = HALMAC_REG_R8(REG_DBI_FLAG_V1 + 2);
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cnt--;
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}
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if (tmp_u1b) {
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ret = 0xFFFF;
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PLTFM_MSG_ERR("[ERR]DBI read fail!\n");
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} else {
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ret = HALMAC_REG_R32(REG_DBI_RDATA_V1);
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PLTFM_MSG_TRACE("[TRACE]Value-R = %x\n", ret);
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}
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return ret;
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}
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enum halmac_ret_status
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dbi_w8_88xx(struct halmac_adapter *adapter, u16 addr, u8 data)
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{
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u8 tmp_u1b = 0;
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u32 cnt = 0;
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u16 write_addr = 0;
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u16 remainder = addr & (4 - 1);
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struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
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HALMAC_REG_W8(REG_DBI_WDATA_V1 + remainder, data);
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write_addr = ((addr & 0x0ffc) | (BIT(0) << (remainder + 12)));
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HALMAC_REG_W16(REG_DBI_FLAG_V1, write_addr);
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PLTFM_MSG_TRACE("[TRACE]Addr-W = %x\n", write_addr);
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HALMAC_REG_W8(REG_DBI_FLAG_V1 + 2, 0x01);
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tmp_u1b = HALMAC_REG_R8(REG_DBI_FLAG_V1 + 2);
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cnt = 20;
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while (tmp_u1b && (cnt != 0)) {
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PLTFM_DELAY_US(10);
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tmp_u1b = HALMAC_REG_R8(REG_DBI_FLAG_V1 + 2);
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cnt--;
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}
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if (tmp_u1b) {
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PLTFM_MSG_ERR("[ERR]DBI write fail!\n");
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return HALMAC_RET_FAIL;
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}
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return HALMAC_RET_SUCCESS;
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}
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u8
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dbi_r8_88xx(struct halmac_adapter *adapter, u16 addr)
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{
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u16 read_addr = addr & 0x0ffc;
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u8 tmp_u1b = 0;
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u32 cnt = 0;
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u8 ret = 0;
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struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
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HALMAC_REG_W16(REG_DBI_FLAG_V1, read_addr);
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HALMAC_REG_W8(REG_DBI_FLAG_V1 + 2, 0x2);
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tmp_u1b = HALMAC_REG_R8(REG_DBI_FLAG_V1 + 2);
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cnt = 20;
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while (tmp_u1b && (cnt != 0)) {
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PLTFM_DELAY_US(10);
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tmp_u1b = HALMAC_REG_R8(REG_DBI_FLAG_V1 + 2);
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cnt--;
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}
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if (tmp_u1b) {
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ret = 0xFF;
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PLTFM_MSG_ERR("[ERR]DBI read fail!\n");
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} else {
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ret = HALMAC_REG_R8(REG_DBI_RDATA_V1 + (addr & (4 - 1)));
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PLTFM_MSG_TRACE("[TRACE]Value-R = %x\n", ret);
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}
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return ret;
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}
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enum halmac_ret_status
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trxdma_check_idle_88xx(struct halmac_adapter *adapter)
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{
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u32 cnt = 0;
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struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
|
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/* Stop Tx & Rx DMA */
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HALMAC_REG_W32_SET(REG_RXPKT_NUM, BIT(18));
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HALMAC_REG_W16_SET(REG_PCIE_CTRL, ~(BIT(15) | BIT(8)));
|
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/* Stop FW */
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HALMAC_REG_W16_CLR(REG_SYS_FUNC_EN, BIT(10));
|
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/* Check Tx DMA is idle */
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cnt = 20;
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while ((HALMAC_REG_R8(REG_SYS_CFG5) & BIT(2)) == BIT(2)) {
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PLTFM_DELAY_US(10);
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cnt--;
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if (cnt == 0) {
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PLTFM_MSG_ERR("[ERR]Chk tx idle\n");
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return HALMAC_RET_POWER_OFF_FAIL;
|
}
|
}
|
|
/* Check Rx DMA is idle */
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cnt = 20;
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while ((HALMAC_REG_R32(REG_RXPKT_NUM) & BIT(17)) != BIT(17)) {
|
PLTFM_DELAY_US(10);
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cnt--;
|
if (cnt == 0) {
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PLTFM_MSG_ERR("[ERR]Chk rx idle\n");
|
return HALMAC_RET_POWER_OFF_FAIL;
|
}
|
}
|
|
return HALMAC_RET_SUCCESS;
|
}
|
|
enum halmac_ret_status
|
en_ref_autok_pcie_88xx(struct halmac_adapter *adapter, u8 en)
|
{
|
if (en == 1)
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adapter->pcie_refautok_en = 1;
|
else
|
adapter->pcie_refautok_en = 0;
|
return HALMAC_RET_SUCCESS;
|
}
|
|
#endif /* HALMAC_88XX_SUPPORT */
|
