/******************************************************************************
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*
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* Copyright(c) 2017 - 2019 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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******************************************************************************/
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#include "halmac_cfg_wmac_8822c.h"
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#if HALMAC_8822C_SUPPORT
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/**
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* cfg_drv_info_8822c() - config driver info
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* @adapter : the adapter of halmac
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* @drv_info : driver information selection
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* Author : KaiYuan Chang/Ivan Lin
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* Return : enum halmac_ret_status
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* More details of status code can be found in prototype document
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*/
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enum halmac_ret_status
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cfg_drv_info_8822c(struct halmac_adapter *adapter,
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enum halmac_drv_info drv_info)
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{
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u8 drv_info_size = 0;
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u8 phy_status_en = 0;
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u8 sniffer_en = 0;
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u8 plcp_hdr_en = 0;
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u32 value32;
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struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
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struct halmac_rx_ignore_info *info = &adapter->rx_ignore_info;
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struct halmac_mac_rx_ignore_cfg cfg;
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PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
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PLTFM_MSG_TRACE("[TRACE]drv info = %d\n", drv_info);
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switch (drv_info) {
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case HALMAC_DRV_INFO_NONE:
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drv_info_size = 0;
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phy_status_en = 0;
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sniffer_en = 0;
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plcp_hdr_en = 0;
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info->hdr_chk_mask = 1;
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info->fcs_chk_mask = 1;
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break;
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case HALMAC_DRV_INFO_PHY_STATUS:
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drv_info_size = 4;
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phy_status_en = 1;
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sniffer_en = 0;
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plcp_hdr_en = 0;
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info->hdr_chk_mask = 1;
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info->fcs_chk_mask = 1;
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break;
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case HALMAC_DRV_INFO_PHY_SNIFFER:
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drv_info_size = 5; /* phy status 4byte, sniffer info 1byte */
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phy_status_en = 1;
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sniffer_en = 1;
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plcp_hdr_en = 0;
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info->hdr_chk_mask = 0;
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info->fcs_chk_mask = 0;
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break;
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case HALMAC_DRV_INFO_PHY_PLCP:
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drv_info_size = 6; /* phy status 4byte, plcp header 2byte */
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phy_status_en = 1;
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sniffer_en = 0;
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plcp_hdr_en = 1;
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info->hdr_chk_mask = 0;
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info->fcs_chk_mask = 0;
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break;
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default:
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return HALMAC_RET_SW_CASE_NOT_SUPPORT;
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}
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cfg.hdr_chk_en = info->hdr_chk_en;
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cfg.fcs_chk_en = info->fcs_chk_en;
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cfg.cck_rst_en = info->cck_rst_en;
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cfg.fcs_chk_thr = info->fcs_chk_thr;
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api->halmac_set_hw_value(adapter, HALMAC_HW_RX_IGNORE, &cfg);
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HALMAC_REG_W8(REG_RX_DRVINFO_SZ, drv_info_size);
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adapter->drv_info_size = drv_info_size;
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value32 = HALMAC_REG_R32(REG_RCR);
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value32 = (value32 & (~BIT_APP_PHYSTS));
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if (phy_status_en == 1)
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value32 = value32 | BIT_APP_PHYSTS;
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HALMAC_REG_W32(REG_RCR, value32);
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value32 = HALMAC_REG_R32(REG_WMAC_OPTION_FUNCTION + 4);
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value32 = (value32 & (~(BIT(8) | BIT(9))));
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if (sniffer_en == 1)
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value32 = value32 | BIT(9);
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if (plcp_hdr_en == 1)
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value32 = value32 | BIT(8);
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HALMAC_REG_W32(REG_WMAC_OPTION_FUNCTION + 4, value32);
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PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
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return HALMAC_RET_SUCCESS;
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}
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/**
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* init_low_pwr_8822c() - config WMAC register
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* @adapter
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* Author : KaiYuan Chang/Ivan Lin
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* Return : enum halmac_ret_status
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* More details of status code can be found in prototype document
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*/
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enum halmac_ret_status
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init_low_pwr_8822c(struct halmac_adapter *adapter)
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{
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u16 value16;
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struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
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PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
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/*RXGCK FIFO threshold CFG*/
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value16 = (HALMAC_REG_R16(REG_RXPSF_CTRL + 2) & 0xF00F);
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value16 |= BIT(10) | BIT(8) | BIT(6) | BIT(4);
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HALMAC_REG_W16(REG_RXPSF_CTRL + 2, value16);
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/*invalid_pkt CFG*/
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value16 = 0;
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value16 = BIT_SET_RXPSF_PKTLENTHR(value16, 1);
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value16 |= BIT_RXPSF_CTRLEN | BIT_RXPSF_VHTCHKEN | BIT_RXPSF_HTCHKEN
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| BIT_RXPSF_OFDMCHKEN | BIT_RXPSF_CCKCHKEN
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| BIT_RXPSF_OFDMRST;
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HALMAC_REG_W16(REG_RXPSF_CTRL, value16);
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HALMAC_REG_W32(REG_RXPSF_TYPE_CTRL, 0xFFFFFFFF);
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PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
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return HALMAC_RET_SUCCESS;
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}
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void
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cfg_rxgck_fifo_8822c(struct halmac_adapter *adapter, u8 enable)
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{
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struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
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if (enable == 1) {
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if (adapter->hw_cfg_info.trx_mode != HALMAC_TRNSFER_NORMAL)
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PLTFM_MSG_ERR("[ERR]trx_mode != normal\n");
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else
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HALMAC_REG_W8_SET(REG_RXPSF_CTRL + 3, BIT(4));
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} else {
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HALMAC_REG_W8_CLR(REG_RXPSF_CTRL + 3, BIT(4));
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}
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}
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void
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cfg_rx_ignore_8822c(struct halmac_adapter *adapter,
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struct halmac_mac_rx_ignore_cfg *cfg)
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{
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u16 value16;
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struct halmac_rx_ignore_info *info = &adapter->rx_ignore_info;
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struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
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PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
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value16 = HALMAC_REG_R16(REG_RXPSF_CTRL);
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info->hdr_chk_en = cfg->hdr_chk_en;
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info->fcs_chk_en = cfg->fcs_chk_en;
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info->cck_rst_en = cfg->cck_rst_en;
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info->fcs_chk_thr = cfg->fcs_chk_thr;
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/*mac header check enable*/
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if (cfg->hdr_chk_en == 1 && info->hdr_chk_mask == 1)
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value16 |= BIT_RXPSF_MHCHKEN;
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else
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value16 &= ~(BIT_RXPSF_MHCHKEN);
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/*continuous FCS error counter enable*/
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if (cfg->fcs_chk_en == 1 && info->fcs_chk_mask == 1)
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value16 |= BIT_RXPSF_CONT_ERRCHKEN;
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else
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value16 &= ~(BIT_RXPSF_CONT_ERRCHKEN);
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/*MAC Rx reset when CCK enable*/
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if (cfg->cck_rst_en == 1)
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value16 |= BIT_RXPSF_CCKRST;
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else
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value16 &= ~(BIT_RXPSF_CCKRST);
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/*FCS error counter threshold*/
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value16 = BIT_SET_RXPSF_ERRTHR(value16, cfg->fcs_chk_thr);
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HALMAC_REG_W16(REG_RXPSF_CTRL, value16);
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PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
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}
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void
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cfg_ampdu_8822c(struct halmac_adapter *adapter,
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struct halmac_ampdu_config *cfg)
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{
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u32 ht_max_len;
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u32 vht_max_len;
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struct halmac_api *api = (struct halmac_api *)adapter->halmac_api;
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HALMAC_REG_W8(REG_PROT_MODE_CTRL + 2, cfg->max_agg_num);
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HALMAC_REG_W8(REG_PROT_MODE_CTRL + 3, cfg->max_agg_num);
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if (cfg->max_len_en == 1) {
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ht_max_len = cfg->ht_max_len & 0xFFFF;
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vht_max_len = cfg->vht_max_len & 0xFFFFF;
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HALMAC_REG_W32(REG_AMPDU_MAX_LENGTH_HT, ht_max_len);
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HALMAC_REG_W32(REG_AMPDU_MAX_LENGTH_VHT, vht_max_len);
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}
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}
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#endif /* HALMAC_8822C_SUPPORT */
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