/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#ifndef __HAL_DM_H__
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#define __HAL_DM_H__
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#define adapter_to_phydm(adapter) (&(GET_HAL_DATA(adapter)->odmpriv))
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#define dvobj_to_phydm(dvobj) adapter_to_phydm(dvobj_get_primary_adapter(dvobj))
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#ifdef CONFIG_TDMADIG
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void rtw_phydm_tdmadig(_adapter *adapter, u8 state);
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#endif
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void rtw_phydm_priv_init(_adapter *adapter);
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void Init_ODM_ComInfo(_adapter *adapter);
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void rtw_phydm_init(_adapter *adapter);
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void rtw_hal_turbo_edca(_adapter *adapter);
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u8 rtw_phydm_is_iqk_in_progress(_adapter *adapter);
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void GetHalODMVar(
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PADAPTER Adapter,
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HAL_ODM_VARIABLE eVariable,
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void *pValue1,
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void *pValue2);
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void SetHalODMVar(
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PADAPTER Adapter,
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HAL_ODM_VARIABLE eVariable,
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void *pValue1,
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BOOLEAN bSet);
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void rtw_phydm_ra_registed(_adapter *adapter, struct sta_info *psta);
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#ifdef CONFIG_DYNAMIC_SOML
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void rtw_dyn_soml_byte_update(_adapter *adapter, u8 data_rate, u32 size);
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void rtw_dyn_soml_para_set(_adapter *adapter, u8 train_num, u8 intvl,
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u8 period, u8 delay);
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void rtw_dyn_soml_config(_adapter *adapter);
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#endif
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void rtw_phydm_set_rrsr(_adapter *adapter, u32 rrsr_value, bool write_rrsr);
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void rtw_phydm_dyn_rrsr_en(_adapter *adapter, bool en_rrsr);
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void rtw_phydm_update_ap_vendor_ie(_adapter *adapter);
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void rtw_phydm_watchdog(_adapter *adapter, bool in_lps);
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void rtw_hal_update_iqk_fw_offload_cap(_adapter *adapter);
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void dump_sta_info(void *sel, struct sta_info *psta);
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void dump_sta_traffic(void *sel, _adapter *adapter, struct sta_info *psta);
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void rtw_hal_phydm_cal_trigger(_adapter *adapter);
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#ifdef CONFIG_DBG_RF_CAL
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void rtw_hal_iqk_test(_adapter *adapter, bool recovery, bool clear, bool segment);
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void rtw_hal_lck_test(_adapter *adapter);
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#endif
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s8 rtw_dm_get_min_rssi(_adapter *adapter);
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s8 rtw_phydm_get_min_rssi(_adapter *adapter);
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u8 rtw_phydm_get_cur_igi(_adapter *adapter);
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bool rtw_phydm_get_edcca_flag(_adapter *adapter);
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#ifdef CONFIG_LPS_LCLK_WD_TIMER
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extern void phydm_rssi_monitor_check(void *p_dm_void);
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void rtw_phydm_wd_lps_lclk_hdl(_adapter *adapter);
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void rtw_phydm_watchdog_in_lps_lclk(_adapter *adapter);
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#endif
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#ifdef CONFIG_TDMADIG
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enum rtw_tdmadig_state{
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TDMADIG_INIT,
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TDMADIG_NON_INIT,
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};
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#endif
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enum phy_cnt {
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FA_OFDM,
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FA_CCK,
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FA_TOTAL,
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CCA_OFDM,
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CCA_CCK,
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CCA_ALL,
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CRC32_OK_VHT,
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CRC32_OK_HT,
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CRC32_OK_LEGACY,
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CRC32_OK_CCK,
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CRC32_ERROR_VHT,
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CRC32_ERROR_HT,
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CRC32_ERROR_LEGACY,
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CRC32_ERROR_CCK,
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};
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u32 rtw_phydm_get_phy_cnt(_adapter *adapter, enum phy_cnt cnt);
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#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1) || (RTL8822C_SUPPORT == 1) \
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|| (RTL8723F_SUPPORT == 1))
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void rtw_phydm_iqk_trigger(_adapter *adapter);
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#endif
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void rtw_phydm_read_efuse(_adapter *adapter);
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bool rtw_phydm_set_crystal_cap(_adapter *adapter, u8 crystal_cap);
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#ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR
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void rtw_phydm_set_dyntxpwr(_adapter *adapter, u8 *desc, u8 mac_id);
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#endif
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#ifdef CONFIG_LPS_PG
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void rtw_phydm_lps_pg_hdl(_adapter *adapter, struct sta_info *sta, bool in_lpspg);
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#endif
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#ifdef CONFIG_LPS_PWR_TRACKING
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void rtw_phydm_pwr_tracking_directly(_adapter *adapter);
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#endif
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#ifdef CONFIG_CTRL_TXSS_BY_TP
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void rtw_phydm_trx_cfg(_adapter *adapter, bool tx_1ss);
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#endif
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u8 rtw_hal_runtime_trx_path_decision(_adapter *adapter);
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bool rtw_phydm_rfe_ctrl_gpio(_adapter *adapter, u8 gpio_num);
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#endif /* __HAL_DM_H__ */
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