/*
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* Copyright (C) 2011 Samsung Electronics
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*
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* Configuration settings for the SAMSUNG SMDKV310 (EXYNOS4210) board.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include "exynos4-common.h"
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#undef CONFIG_BOARD_COMMON
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#undef CONFIG_USB_GADGET_DWC2_OTG_PHY
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#undef CONFIG_REVISION_TAG
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/* High Level Configuration Options */
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#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */
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#define CONFIG_SMDKV310 1 /* working with SMDKV310*/
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/* Mach Type */
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#define CONFIG_MACH_TYPE MACH_TYPE_SMDKV310
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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#define CONFIG_SYS_TEXT_BASE 0x43E00000
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/* Handling Sleep Mode*/
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#define S5P_CHECK_SLEEP 0x00000BAD
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#define S5P_CHECK_DIDLE 0xBAD00000
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#define S5P_CHECK_LPA 0xABAD0000
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/* select serial console configuration */
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#define CONFIG_SERIAL1 1 /* use SERIAL 1 */
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#define EXYNOS4_DEFAULT_UART_OFFSET 0x010000
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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/* MMC SPL */
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define COPY_BL2_FNPTR_ADDR 0x00002488
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#define CONFIG_SPL_TEXT_BASE 0x02021410
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#define CONFIG_BOOTCOMMAND "fatload mmc 0 40007000 uImage; bootm 40007000"
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/* Miscellaneous configurable options */
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#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
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/* memtest works on */
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000)
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
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/* SMDKV310 has 4 bank of DRAM */
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#define CONFIG_NR_DRAM_BANKS 4
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#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
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#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
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#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
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#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
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#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
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#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
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#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
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#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
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#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
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/* FLASH and environment organization */
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#define CONFIG_CLK_1000_400_200
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/* MIU (Memory Interleaving Unit) */
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#define CONFIG_MIU_2BIT_INTERLEAVED
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */
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#define RESERVE_BLOCK_SIZE (512)
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#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
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#define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE)
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#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
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#define CONFIG_SYS_INIT_SP_ADDR 0x02040000
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/* U-Boot copy size from boot Media to DRAM.*/
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#define COPY_BL2_SIZE 0x80000
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#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
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#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512)
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/* Ethernet Controllor Driver */
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#ifdef CONFIG_CMD_NET
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#define CONFIG_SMC911X
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#define CONFIG_SMC911X_BASE 0x5000000
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#define CONFIG_SMC911X_16_BIT
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#define CONFIG_ENV_SROM_BANK 1
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#endif /*CONFIG_CMD_NET*/
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#endif /* __CONFIG_H */
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