/*
|
* Configuation settings for the SAMA5D3xEK board.
|
*
|
* Copyright (C) 2012 - 2013 Atmel
|
*
|
* based on at91sam9m10g45ek.h by:
|
* Stelian Pop <stelian@popies.net>
|
* Lead Tech Design <www.leadtechdesign.com>
|
*
|
* SPDX-License-Identifier: GPL-2.0+
|
*/
|
|
#ifndef __CONFIG_H
|
#define __CONFIG_H
|
|
#include "at91-sama5_common.h"
|
|
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
|
|
/*
|
* This needs to be defined for the OHCI code to work but it is defined as
|
* ATMEL_ID_UHPHS in the CPU specific header files.
|
*/
|
#define ATMEL_ID_UHP ATMEL_ID_UHPHS
|
|
/*
|
* Specify the clock enable bit in the PMC_SCER register.
|
*/
|
#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
|
|
/* LCD */
|
#define LCD_BPP LCD_COLOR16
|
#define LCD_OUTPUT_BPP 24
|
#define CONFIG_LCD_LOGO
|
#define CONFIG_LCD_INFO
|
#define CONFIG_LCD_INFO_BELOW_LOGO
|
#define CONFIG_ATMEL_HLCD
|
#define CONFIG_ATMEL_LCD_RGB565
|
|
/* board specific (not enough SRAM) */
|
#define CONFIG_SAMA5D3_LCD_BASE 0x23E00000
|
|
/* NOR flash */
|
#ifdef CONFIG_MTD_NOR_FLASH
|
#define CONFIG_FLASH_CFI_DRIVER
|
#define CONFIG_SYS_FLASH_CFI
|
#define CONFIG_SYS_FLASH_PROTECTION
|
#define CONFIG_SYS_FLASH_BASE 0x10000000
|
#define CONFIG_SYS_MAX_FLASH_SECT 131
|
#define CONFIG_SYS_MAX_FLASH_BANKS 1
|
#endif
|
|
/* SDRAM */
|
#define CONFIG_NR_DRAM_BANKS 1
|
#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
|
#define CONFIG_SYS_SDRAM_SIZE 0x20000000
|
|
#ifdef CONFIG_SPL_BUILD
|
#define CONFIG_SYS_INIT_SP_ADDR 0x318000
|
#else
|
#define CONFIG_SYS_INIT_SP_ADDR \
|
(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
|
#endif
|
|
/* SerialFlash */
|
|
#ifdef CONFIG_CMD_SF
|
#define CONFIG_SF_DEFAULT_SPEED 30000000
|
#endif
|
|
/* NAND flash */
|
#ifdef CONFIG_CMD_NAND
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
|
/* our ALE is AD21 */
|
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
|
/* our CLE is AD22 */
|
#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
|
#define CONFIG_SYS_NAND_ONFI_DETECTION
|
#endif
|
|
/* USB */
|
#ifdef CONFIG_CMD_USB
|
#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
|
#define CONFIG_USB_OHCI_NEW
|
#define CONFIG_SYS_USB_OHCI_CPU_INIT
|
#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
|
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "sama5d3"
|
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
|
#endif
|
|
#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
|
|
#ifdef CONFIG_SYS_USE_SERIALFLASH
|
/* override the bootcmd, bootargs and other configuration for spi flash env*/
|
#elif CONFIG_SYS_USE_NANDFLASH
|
/* override the bootcmd, bootargs and other configuration nandflash env */
|
#elif CONFIG_SYS_USE_MMC
|
/* override the bootcmd, bootargs and other configuration for sd/mmc env */
|
#endif
|
|
/* SPL */
|
#define CONFIG_SPL_FRAMEWORK
|
#define CONFIG_SPL_TEXT_BASE 0x300000
|
#define CONFIG_SPL_MAX_SIZE 0x18000
|
#define CONFIG_SPL_BSS_START_ADDR 0x20000000
|
#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
|
#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
|
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
|
|
#define CONFIG_SYS_MONITOR_LEN (512 << 10)
|
|
#ifdef CONFIG_SYS_USE_MMC
|
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
|
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
|
|
#elif CONFIG_SYS_USE_NANDFLASH
|
#define CONFIG_SPL_NAND_DRIVERS
|
#define CONFIG_SPL_NAND_BASE
|
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
|
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
|
#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
|
#define CONFIG_SYS_NAND_PAGE_COUNT 64
|
#define CONFIG_SYS_NAND_OOBSIZE 64
|
#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
|
#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
|
|
#elif CONFIG_SYS_USE_SERIALFLASH
|
#define CONFIG_SPL_SPI_LOAD
|
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x10000
|
|
#endif
|
|
#endif
|
