/*
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* (C) Copyright 2017 Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_RK322X_COMMON_H
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#define __CONFIG_RK322X_COMMON_H
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#include <asm/arch/hardware.h>
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#include "rockchip-common.h"
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_SYS_MALLOC_LEN (32 << 20)
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#define CONFIG_SYS_CBSIZE 2048
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#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SYS_TEXT_BASE 0x60200000
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#define CONFIG_SYS_INIT_SP_ADDR 0x60400000
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#define CONFIG_SYS_LOAD_ADDR 0x61800800
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#define CONFIG_SPL_TEXT_BASE 0x60000000
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#define GICD_BASE 0x32011000
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#define GICC_BASE 0x32012000
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#define CONFIG_ROCKCHIP_MAX_INIT_SIZE (28 << 10)
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#define CONFIG_ROCKCHIP_CHIP_TAG "RK32"
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#define CONFIG_ROCKUSB_G_DNL_PID 0x320B
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/* MMC/SD IP block */
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#define CONFIG_BOUNCE_BUFFER
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#define CONFIG_SYS_SDRAM_BASE 0x60000000
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#define SDRAM_BANK_SIZE (512UL << 20UL)
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#define SDRAM_MAX_SIZE 0x80000000
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#ifndef CONFIG_SPL_BUILD
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/* usb mass storage */
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#define CONFIG_USB_FUNCTION_MASS_STORAGE
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/* usb host */
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#define ENV_MEM_LAYOUT_SETTINGS \
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"scriptaddr=0x60000000\0" \
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"pxefile_addr_r=0x60100000\0" \
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"fdt_addr_r=0x68300000\0" \
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"kernel_addr_r=0x62008000\0" \
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"ramdisk_addr_r=0x6a200000\0"
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#include <config_distro_bootcmd.h>
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"partitions=" PARTS_DEFAULT \
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ENV_MEM_LAYOUT_SETTINGS \
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ROCKCHIP_DEVICE_SETTINGS \
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RKIMG_DET_BOOTDEV \
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BOOTENV
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#endif
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#define CONFIG_PREBOOT
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#endif
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