/*
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* Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#ifndef __MX6_COMMON_H
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#define __MX6_COMMON_H
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#ifndef CONFIG_MX6UL
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#ifndef CONFIG_SYS_L2CACHE_OFF
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#define CONFIG_SYS_L2_PL310
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#define CONFIG_SYS_PL310_BASE L2_PL310_BASE
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#endif
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#define CONFIG_MP
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#endif
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#define CONFIG_BOARD_POSTCLK_INIT
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#define CONFIG_MXC_GPT_HCLK
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#define CONFIG_SYS_BOOTM_LEN 0x1000000
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#include <linux/sizes.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/mach-imx/gpio.h>
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#ifndef CONFIG_MX6
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#define CONFIG_MX6
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#endif
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#define CONFIG_SYS_FSL_CLK
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/* ATAGs */
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_REVISION_TAG
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/* Boot options */
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#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL) || \
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defined(CONFIG_MX6UL) || defined(CONFIG_MX6SLL))
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#define CONFIG_LOADADDR 0x82000000
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#ifndef CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_TEXT_BASE 0x87800000
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#endif
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#else
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#define CONFIG_LOADADDR 0x12000000
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#ifndef CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_TEXT_BASE 0x17800000
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#endif
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#endif
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_CONS_INDEX 1
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/* Filesystems and image support */
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#define CONFIG_SUPPORT_RAW_INITRD
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_CBSIZE 512
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#define CONFIG_SYS_MAXARGS 32
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#ifndef CONFIG_SYS_DCACHE_OFF
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#endif
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/* GPIO */
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#define CONFIG_MXC_GPIO
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/* MMC */
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#define CONFIG_BOUNCE_BUFFER
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#define CONFIG_FSL_ESDHC
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#define CONFIG_FSL_USDHC
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/* Fuses */
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#define CONFIG_MXC_OCOTP
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/* Secure boot (HAB) support */
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#ifdef CONFIG_SECURE_BOOT
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#define CONFIG_CSF_SIZE 0x2000
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
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#endif
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#endif
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#endif
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