/*
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* Copyright (C) 2013 Samsung Electronics
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*
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* Common configuration settings for the SAMSUNG EXYNOS boards.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __EXYNOS_COMMON_H
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#define __EXYNOS_COMMON_H
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/* High Level Configuration Options */
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#define CONFIG_SAMSUNG /* in a SAMSUNG core */
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#define CONFIG_S5P /* S5P Family */
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#include <asm/arch/cpu.h> /* get chip and board defs */
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#include <linux/sizes.h>
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#define CONFIG_ARCH_CPU_INIT
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#define CONFIG_SKIP_LOWLEVEL_INIT
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/* Keep L2 Cache Disabled */
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/* input clock of PLL: 24MHz input clock */
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#define CONFIG_SYS_CLK_FREQ 24000000
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#define COUNTER_FREQUENCY CONFIG_SYS_CLK_FREQ
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_INITRD_TAG
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#define CONFIG_ENV_OVERWRITE
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/* Size of malloc() pool before and after relocation */
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 << 20))
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/* select serial console configuration */
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/* SD/MMC configuration */
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#define CONFIG_BOUNCE_BUFFER
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/* PWM */
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#define CONFIG_PWM
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
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/* Boot Argument Buffer Size */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#include <config_distro_defaults.h>
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#endif /* __CONFIG_H */
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