/*
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* Copyright 2016 Toradex AG
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*
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* Configuration settings for the Colibri iMX7 module.
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*
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* based on mx7dsabresd.h:
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* Copyright (C) 2015 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __COLIBRI_IMX7_CONFIG_H
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#define __COLIBRI_IMX7_CONFIG_H
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#include "mx7_common.h"
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/*#define CONFIG_DBG_MONITOR*/
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#define PHYS_SDRAM_SIZE SZ_512M
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#define CONFIG_DISPLAY_BOARDINFO_LATE /* Calls show_board_info() */
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#define CONFIG_ENV_VARS_UBOOT_CONFIG
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#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
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/* Network */
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#define CONFIG_FEC_MXC
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#define CONFIG_MII
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#define CONFIG_FEC_XCV_TYPE RMII
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#define CONFIG_ETHPRIME "FEC"
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#define CONFIG_FEC_MXC_PHYADDR 0
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#define CONFIG_IP_DEFRAG
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#define CONFIG_TFTP_BLOCKSIZE 16352
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#define CONFIG_TFTP_TSIZE
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/* ENET1 */
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#define IMX_FEC_BASE ENET_IPS_BASE_ADDR
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/* MMC Config*/
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_SYS_FSL_USDHC_NUM 1
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#undef CONFIG_BOOTM_PLAN9
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#undef CONFIG_BOOTM_RTEMS
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/* I2C configs */
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_IPADDR 192.168.10.2
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#define CONFIG_NETMASK 255.255.255.0
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#define CONFIG_SERVERIP 192.168.10.1
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#define MEM_LAYOUT_ENV_SETTINGS \
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"bootm_size=0x10000000\0" \
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"fdt_addr_r=0x82000000\0" \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0" \
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"kernel_addr_r=0x81000000\0" \
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"ramdisk_addr_r=0x82100000\0"
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#define SD_BOOTCMD \
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"sdargs=root=/dev/mmcblk0p2 rw rootwait\0" \
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"sdboot=run setup; setenv bootargs ${defargs} ${sdargs} " \
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"${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \
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"run m4boot && " \
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"load mmc 0:1 ${kernel_addr_r} ${kernel_file} && " \
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"load mmc 0:1 ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \
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"run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
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#define NFS_BOOTCMD \
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"nfsargs=ip=:::::eth0: root=/dev/nfs\0" \
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"nfsboot=run setup; " \
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"setenv bootargs ${defargs} ${nfsargs} " \
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"${setupargs} ${vidargs}; echo Booting from NFS...;" \
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"dhcp ${kernel_addr_r} && " \
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"tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \
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"run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
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#define UBI_BOOTCMD \
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"ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \
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"ubi.fm_autoconvert=1\0" \
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"ubiboot=run setup; " \
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"setenv bootargs ${defargs} ${ubiargs} " \
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"${setupargs} ${vidargs}; echo Booting from NAND...; " \
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"ubi part ubi && run m4boot && " \
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"ubi read ${kernel_addr_r} kernel && " \
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"ubi read ${fdt_addr_r} dtb && " \
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"run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
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#define CONFIG_BOOTCOMMAND "run ubiboot; run sdboot; run nfsboot"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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MEM_LAYOUT_ENV_SETTINGS \
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NFS_BOOTCMD \
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SD_BOOTCMD \
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UBI_BOOTCMD \
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"console=ttymxc0\0" \
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"defargs=\0" \
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"fdt_board=eval-v3\0" \
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"fdt_fixup=;\0" \
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"m4boot=;\0" \
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"ip_dyn=yes\0" \
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"kernel_file=zImage\0" \
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"mtdparts=" MTDPARTS_DEFAULT "\0" \
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"setethupdate=if env exists ethaddr; then; else setenv ethaddr " \
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"00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \
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"${board}/flash_eth.img && source ${loadaddr}\0" \
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"setsdupdate=mmc rescan && setenv interface mmc && " \
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"fatload ${interface} 0:1 ${loadaddr} " \
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"${board}/flash_blk.img && source ${loadaddr}\0" \
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"setup=setenv setupargs " \
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"console=tty1 console=${console}" \
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",${baudrate}n8 ${memargs} consoleblank=0\0" \
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"setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \
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"setusbupdate=usb start && setenv interface usb && " \
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"fatload ${interface} 0:1 ${loadaddr} " \
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"${board}/flash_blk.img && source ${loadaddr}\0" \
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"splashpos=m,m\0" \
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"videomode=video=ctfb:x:640,y:480,depth:18,pclk:39722,le:48,ri:16,up:33,lo:10,hs:96,vs:2,sync:0,vmode:0\0" \
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"updlevel=2\0"
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_MEMTEST_START 0x80000000
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x0c000000)
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* environment organization */
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#if defined(CONFIG_ENV_IS_IN_MMC)
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#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */
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#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
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#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
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#define CONFIG_ENV_OFFSET (8 * SZ_64K)
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#elif defined(CONFIG_ENV_IS_IN_NAND)
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#define CONFIG_ENV_SECT_SIZE (128 * 1024)
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#define CONFIG_ENV_OFFSET (28 * CONFIG_ENV_SECT_SIZE)
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#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
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#endif
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/* NAND stuff */
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0x40000000
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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#define CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES
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/* Dynamic MTD partition support */
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/* DMA stuff, needed for GPMI/MXS NAND support */
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/* USB Configs */
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#define CONFIG_IMX_THERMAL
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#define CONFIG_USBD_HS
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#define CONFIG_USB_FUNCTION_MASS_STORAGE
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/* USB Device Firmware Update support */
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#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M
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#define DFU_DEFAULT_POLL_TIMEOUT 300
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#ifdef CONFIG_VIDEO
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#define CONFIG_VIDEO_MXS
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#define CONFIG_VIDEO_LOGO
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_SPLASH_SCREEN_ALIGN
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#define CONFIG_BMP_16BPP
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#define CONFIG_VIDEO_BMP_RLE8
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#define CONFIG_VIDEO_BMP_LOGO
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#endif
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#endif
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