/*
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* (C) Copyright 2007-2008
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* Stelian Pop <stelian@popies.net>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* Configuation settings for the AT91SAM9RLEK board.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <asm/hardware.h>
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#define CONFIG_SYS_TEXT_BASE 0x21F00000
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/* ARM asynchronous clock */
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#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
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#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */
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#define CONFIG_AT91SAM9RLEK 1 /* It's an AT91SAM9RLEK Board */
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#define CONFIG_ARCH_CPU_INIT
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_INITRD_TAG 1
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#define CONFIG_ATMEL_LEGACY
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/*
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* Hardware drivers
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*/
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/* LCD */
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#define LCD_BPP LCD_COLOR8
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#define CONFIG_LCD_LOGO 1
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#undef LCD_TEST_PATTERN
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#define CONFIG_LCD_INFO 1
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#define CONFIG_LCD_INFO_BELOW_LOGO 1
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#define CONFIG_ATMEL_LCD 1
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#define CONFIG_ATMEL_LCD_RGB565 1
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/* Let board_init_f handle the framebuffer allocation */
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#undef CONFIG_FB_ADDR
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/* SDRAM */
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
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#define CONFIG_SYS_SDRAM_SIZE 0x04000000
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#define CONFIG_SYS_INIT_SP_ADDR \
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(ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
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/* NAND flash */
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
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#define CONFIG_SYS_NAND_DBW_8 1
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/* our ALE is AD21 */
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#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
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/* our CLE is AD22 */
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#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
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#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PB6
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#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD17
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#endif
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/* Ethernet - not present */
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/* USB - not supported */
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#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_MEMTEST_END 0x23e00000
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#ifdef CONFIG_SYS_USE_DATAFLASH
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/* bootstrap + u-boot + env + linux in dataflash on CS0 */
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#define CONFIG_ENV_OFFSET 0x4200
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#define CONFIG_ENV_SIZE 0x4200
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#define CONFIG_ENV_SECT_SIZE 0x210
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#define CONFIG_ENV_SPI_MAX_HZ 15000000
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#define CONFIG_BOOTCOMMAND "sf probe 0; " \
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"sf read 0x22000000 0x84000 0x294000; " \
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"bootm 0x22000000"
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#elif CONFIG_SYS_USE_NANDFLASH
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/* bootstrap + u-boot + env + linux in nandflash */
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#define CONFIG_ENV_OFFSET 0x120000
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#define CONFIG_ENV_OFFSET_REDUND 0x100000
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#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
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#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x600000; " \
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"nand read 0x21000000 0x180000 0x80000; " \
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"bootz 0x22000000 - 0x21000000"
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#else /* CONFIG_SYS_USE_MMC */
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/* bootstrap + u-boot + env + linux in mmc */
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#define CONFIG_ENV_SIZE 0x4000
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#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 at91sam9rlek.dtb; " \
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"fatload mmc 0:1 0x22000000 zImage; " \
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"bootz 0x22000000 - 0x21000000"
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#endif
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#define CONFIG_SYS_LONGHELP 1
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#define CONFIG_CMDLINE_EDITING 1
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#define CONFIG_AUTO_COMPLETE
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
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#endif
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