/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
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/*
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* Copyright(c) 2018 Intel Corporation.
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*
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*/
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#ifndef TID_RDMA_DEFS_H
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#define TID_RDMA_DEFS_H
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#include <rdma/ib_pack.h>
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struct tid_rdma_read_req {
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__le32 kdeth0;
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__le32 kdeth1;
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struct ib_reth reth;
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__be32 tid_flow_psn;
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__be32 tid_flow_qp;
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__be32 verbs_qp;
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};
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struct tid_rdma_read_resp {
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__le32 kdeth0;
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__le32 kdeth1;
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__be32 aeth;
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__be32 reserved[4];
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__be32 verbs_psn;
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__be32 verbs_qp;
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};
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struct tid_rdma_write_req {
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__le32 kdeth0;
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__le32 kdeth1;
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struct ib_reth reth;
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__be32 reserved[2];
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__be32 verbs_qp;
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};
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struct tid_rdma_write_resp {
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__le32 kdeth0;
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__le32 kdeth1;
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__be32 aeth;
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__be32 reserved[3];
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__be32 tid_flow_psn;
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__be32 tid_flow_qp;
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__be32 verbs_qp;
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};
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struct tid_rdma_write_data {
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__le32 kdeth0;
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__le32 kdeth1;
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__be32 reserved[6];
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__be32 verbs_qp;
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};
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struct tid_rdma_resync {
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__le32 kdeth0;
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__le32 kdeth1;
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__be32 reserved[6];
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__be32 verbs_qp;
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};
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struct tid_rdma_ack {
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__le32 kdeth0;
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__le32 kdeth1;
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__be32 aeth;
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__be32 reserved[2];
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__be32 tid_flow_psn;
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__be32 verbs_psn;
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__be32 tid_flow_qp;
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__be32 verbs_qp;
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};
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/*
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* TID RDMA Opcodes
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*/
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#define IB_OPCODE_TID_RDMA 0xe0
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enum {
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IB_OPCODE_WRITE_REQ = 0x0,
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IB_OPCODE_WRITE_RESP = 0x1,
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IB_OPCODE_WRITE_DATA = 0x2,
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IB_OPCODE_WRITE_DATA_LAST = 0x3,
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IB_OPCODE_READ_REQ = 0x4,
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IB_OPCODE_READ_RESP = 0x5,
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IB_OPCODE_RESYNC = 0x6,
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IB_OPCODE_ACK = 0x7,
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IB_OPCODE(TID_RDMA, WRITE_REQ),
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IB_OPCODE(TID_RDMA, WRITE_RESP),
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IB_OPCODE(TID_RDMA, WRITE_DATA),
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IB_OPCODE(TID_RDMA, WRITE_DATA_LAST),
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IB_OPCODE(TID_RDMA, READ_REQ),
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IB_OPCODE(TID_RDMA, READ_RESP),
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IB_OPCODE(TID_RDMA, RESYNC),
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IB_OPCODE(TID_RDMA, ACK),
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};
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#define TID_OP(x) IB_OPCODE_TID_RDMA_##x
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/*
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* Define TID RDMA specific WR opcodes. The ib_wr_opcode
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* enum already provides some reserved values for use by
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* low level drivers. Two of those are used but renamed
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* to be more descriptive.
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*/
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#define IB_WR_TID_RDMA_WRITE IB_WR_RESERVED1
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#define IB_WR_TID_RDMA_READ IB_WR_RESERVED2
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#endif /* TID_RDMA_DEFS_H */
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