/* SPDX-License-Identifier: ((GPL-2.0+ WITH Linux-syscall-note) OR MIT) */
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/*
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* Rockchip module information
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* Copyright (C) 2018-2019 Rockchip Electronics Co., Ltd.
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*/
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#ifndef _UAPI_RKMODULE_CAMERA_H
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#define _UAPI_RKMODULE_CAMERA_H
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#include <linux/types.h>
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#include <linux/rk-video-format.h>
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#define RKMODULE_API_VERSION KERNEL_VERSION(0, 1, 0x2)
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/* using for rk3588 dual isp unite */
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#define RKMOUDLE_UNITE_EXTEND_PIXEL 128
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/* using for rv1109 and rv1126 */
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#define RKMODULE_EXTEND_LINE 24
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#define RKMODULE_NAME_LEN 32
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#define RKMODULE_LSCDATA_LEN 289
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#define RKMODULE_MAX_VC_CH 4
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#define RKMODULE_PADF_GAINMAP_LEN 1024
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#define RKMODULE_PDAF_DCCMAP_LEN 256
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#define RKMODULE_AF_OTP_MAX_LEN 3
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#define RKMODULE_MAX_SENSOR_NUM 8
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#define RKMODULE_CAMERA_MODULE_INDEX "rockchip,camera-module-index"
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#define RKMODULE_CAMERA_MODULE_FACING "rockchip,camera-module-facing"
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#define RKMODULE_CAMERA_MODULE_NAME "rockchip,camera-module-name"
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#define RKMODULE_CAMERA_LENS_NAME "rockchip,camera-module-lens-name"
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#define RKMODULE_CAMERA_SYNC_MODE "rockchip,camera-module-sync-mode"
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#define RKMODULE_INTERNAL_MASTER_MODE "internal_master"
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#define RKMODULE_EXTERNAL_MASTER_MODE "external_master"
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#define RKMODULE_SLAVE_MODE "slave"
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/* BT.656 & BT.1120 multi channel
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* On which channels it can send video data
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* related with struct rkmodule_bt656_mbus_info
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*/
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#define RKMODULE_CAMERA_BT656_ID_EN_BITS_1 (0x1)
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#define RKMODULE_CAMERA_BT656_ID_EN_BITS_2 (0x3)
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#define RKMODULE_CAMERA_BT656_ID_EN_BITS_3 (0x7)
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#define RKMODULE_CAMERA_BT656_ID_EN_BITS_4 (0xf)
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#define RKMODULE_CAMERA_BT656_PARSE_ID_LSB BIT(0)
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#define RKMODULE_CAMERA_BT656_PARSE_ID_MSB BIT(1)
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#define RKMODULE_CAMERA_BT656_CHANNEL_0 BIT(2)
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#define RKMODULE_CAMERA_BT656_CHANNEL_1 BIT(3)
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#define RKMODULE_CAMERA_BT656_CHANNEL_2 BIT(4)
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#define RKMODULE_CAMERA_BT656_CHANNEL_3 BIT(5)
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#define RKMODULE_CAMERA_BT656_CHANNELS (RKMODULE_CAMERA_BT656_CHANNEL_0 | \
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RKMODULE_CAMERA_BT656_CHANNEL_1 | \
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RKMODULE_CAMERA_BT656_CHANNEL_2 | \
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RKMODULE_CAMERA_BT656_CHANNEL_3)
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#define DPHY_MAX_LANE 4
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#define RKMODULE_MULTI_DEV_NUM 4
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#define RKMODULE_GET_MODULE_INFO \
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_IOR('V', BASE_VIDIOC_PRIVATE + 0, struct rkmodule_inf)
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#define RKMODULE_AWB_CFG \
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_IOW('V', BASE_VIDIOC_PRIVATE + 1, struct rkmodule_awb_cfg)
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#define RKMODULE_AF_CFG \
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_IOW('V', BASE_VIDIOC_PRIVATE + 2, struct rkmodule_af_cfg)
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#define RKMODULE_LSC_CFG \
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_IOW('V', BASE_VIDIOC_PRIVATE + 3, struct rkmodule_lsc_cfg)
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#define RKMODULE_GET_HDR_CFG \
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_IOR('V', BASE_VIDIOC_PRIVATE + 4, struct rkmodule_hdr_cfg)
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#define RKMODULE_SET_HDR_CFG \
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_IOW('V', BASE_VIDIOC_PRIVATE + 5, struct rkmodule_hdr_cfg)
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#define RKMODULE_SET_CONVERSION_GAIN \
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_IOW('V', BASE_VIDIOC_PRIVATE + 6, __u32)
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#define RKMODULE_GET_LVDS_CFG \
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_IOR('V', BASE_VIDIOC_PRIVATE + 7, struct rkmodule_lvds_cfg)
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#define RKMODULE_SET_DPCC_CFG \
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_IOW('V', BASE_VIDIOC_PRIVATE + 8, struct rkmodule_dpcc_cfg)
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#define RKMODULE_GET_NR_SWITCH_THRESHOLD \
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_IOR('V', BASE_VIDIOC_PRIVATE + 9, struct rkmodule_nr_switch_threshold)
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#define RKMODULE_SET_QUICK_STREAM \
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_IOW('V', BASE_VIDIOC_PRIVATE + 10, __u32)
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#define RKMODULE_GET_BT656_INTF_TYPE \
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_IOR('V', BASE_VIDIOC_PRIVATE + 11, __u32)
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#define RKMODULE_GET_VC_FMT_INFO \
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_IOR('V', BASE_VIDIOC_PRIVATE + 12, struct rkmodule_vc_fmt_info)
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#define RKMODULE_GET_VC_HOTPLUG_INFO \
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_IOR('V', BASE_VIDIOC_PRIVATE + 13, struct rkmodule_vc_hotplug_info)
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#define RKMODULE_GET_START_STREAM_SEQ \
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_IOR('V', BASE_VIDIOC_PRIVATE + 14, __u32)
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#define RKMODULE_GET_VICAP_RST_INFO \
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_IOR('V', BASE_VIDIOC_PRIVATE + 15, struct rkmodule_vicap_reset_info)
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#define RKMODULE_SET_VICAP_RST_INFO \
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_IOW('V', BASE_VIDIOC_PRIVATE + 16, struct rkmodule_vicap_reset_info)
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#define RKMODULE_GET_BT656_MBUS_INFO \
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_IOR('V', BASE_VIDIOC_PRIVATE + 17, struct rkmodule_bt656_mbus_info)
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#define RKMODULE_GET_DCG_RATIO \
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_IOR('V', BASE_VIDIOC_PRIVATE + 18, struct rkmodule_dcg_ratio)
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#define RKMODULE_GET_SONY_BRL \
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_IOR('V', BASE_VIDIOC_PRIVATE + 19, __u32)
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#define RKMODULE_GET_CHANNEL_INFO \
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_IOWR('V', BASE_VIDIOC_PRIVATE + 20, struct rkmodule_channel_info)
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#define RKMODULE_GET_SYNC_MODE \
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_IOR('V', BASE_VIDIOC_PRIVATE + 21, __u32)
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#define RKMODULE_SET_SYNC_MODE \
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_IOW('V', BASE_VIDIOC_PRIVATE + 22, __u32)
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#define RKMODULE_SET_MCLK \
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_IOW('V', BASE_VIDIOC_PRIVATE + 23, struct rkmodule_mclk_data)
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#define RKMODULE_SET_LINK_FREQ \
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_IOW('V', BASE_VIDIOC_PRIVATE + 24, __s64)
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#define RKMODULE_SET_BUS_CONFIG \
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_IOW('V', BASE_VIDIOC_PRIVATE + 25, struct rkmodule_bus_config)
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#define RKMODULE_GET_BUS_CONFIG \
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_IOR('V', BASE_VIDIOC_PRIVATE + 26, struct rkmodule_bus_config)
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#define RKMODULE_SET_REGISTER \
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_IOW('V', BASE_VIDIOC_PRIVATE + 27, struct rkmodule_reg)
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#define RKMODULE_SYNC_I2CDEV \
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_IOW('V', BASE_VIDIOC_PRIVATE + 28, __u8)
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#define RKMODULE_SYNC_I2CDEV_COMPLETE \
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_IOW('V', BASE_VIDIOC_PRIVATE + 29, __u8)
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#define RKMODULE_SET_DEV_INFO \
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_IOW('V', BASE_VIDIOC_PRIVATE + 30, struct rkmodule_dev_info)
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#define RKMODULE_SET_CSI_DPHY_PARAM \
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_IOW('V', BASE_VIDIOC_PRIVATE + 31, struct rkmodule_csi_dphy_param)
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#define RKMODULE_GET_CSI_DPHY_PARAM \
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_IOWR('V', BASE_VIDIOC_PRIVATE + 32, struct rkmodule_csi_dphy_param)
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#define RKMODULE_GET_CSI_DSI_INFO \
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_IOWR('V', BASE_VIDIOC_PRIVATE + 33, __u32)
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#define RKMODULE_GET_HDMI_MODE \
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_IOR('V', BASE_VIDIOC_PRIVATE + 34, __u32)
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#define RKMODULE_SET_SENSOR_INFOS \
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_IOWR('V', BASE_VIDIOC_PRIVATE + 35, struct rkmodule_sensor_infos)
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#define RKMODULE_GET_READOUT_LINE_CNT_PER_LINE \
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_IOR('V', BASE_VIDIOC_PRIVATE + 36, __u32)
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#define RKMODULE_GET_GROUP_ID \
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_IOR('V', BASE_VIDIOC_PRIVATE + 37, __u32)
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#define RKMODULE_SET_GROUP_ID \
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_IOW('V', BASE_VIDIOC_PRIVATE + 38, __u32)
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#define RKMODULE_GET_CAPTURE_MODE \
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_IOR('V', BASE_VIDIOC_PRIVATE + 39, struct rkmodule_capture_info)
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#define RKMODULE_SET_CAPTURE_MODE \
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_IOW('V', BASE_VIDIOC_PRIVATE + 40, struct rkmodule_capture_info)
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struct rkmodule_i2cdev_info {
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__u8 slave_addr;
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} __attribute__ ((packed));
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struct rkmodule_dev_info {
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union {
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struct rkmodule_i2cdev_info i2c_dev;
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__u32 reserved[8];
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};
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} __attribute__ ((packed));
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/* csi0/csi1 phy support full/split mode */
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enum rkmodule_phy_mode {
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PHY_FULL_MODE,
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PHY_SPLIT_01,
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PHY_SPLIT_23,
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};
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struct rkmodule_mipi_lvds_bus {
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__u32 bus_type;
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__u32 lanes;
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__u32 phy_mode; /* data type enum rkmodule_phy_mode */
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};
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struct rkmodule_bus_config {
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union {
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struct rkmodule_mipi_lvds_bus bus;
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__u32 reserved[32];
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};
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} __attribute__ ((packed));
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struct rkmodule_reg {
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__u64 num_regs;
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__u64 preg_addr;
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__u64 preg_value;
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__u64 preg_addr_bytes;
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__u64 preg_value_bytes;
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} __attribute__ ((packed));
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/**
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* struct rkmodule_base_inf - module base information
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*
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*/
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struct rkmodule_base_inf {
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char sensor[RKMODULE_NAME_LEN];
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char module[RKMODULE_NAME_LEN];
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char lens[RKMODULE_NAME_LEN];
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} __attribute__ ((packed));
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/**
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* struct rkmodule_fac_inf - module factory information
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*
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*/
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struct rkmodule_fac_inf {
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__u32 flag;
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char module[RKMODULE_NAME_LEN];
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char lens[RKMODULE_NAME_LEN];
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__u32 year;
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__u32 month;
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__u32 day;
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} __attribute__ ((packed));
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/**
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* struct rkmodule_awb_inf - module awb information
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*
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*/
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struct rkmodule_awb_inf {
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__u32 flag;
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__u32 r_value;
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__u32 b_value;
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__u32 gr_value;
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__u32 gb_value;
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__u32 golden_r_value;
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__u32 golden_b_value;
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__u32 golden_gr_value;
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__u32 golden_gb_value;
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} __attribute__ ((packed));
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/**
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* struct rkmodule_lsc_inf - module lsc information
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*
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*/
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struct rkmodule_lsc_inf {
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__u32 flag;
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__u16 lsc_w;
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__u16 lsc_h;
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__u16 decimal_bits;
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__u16 lsc_r[RKMODULE_LSCDATA_LEN];
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__u16 lsc_b[RKMODULE_LSCDATA_LEN];
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__u16 lsc_gr[RKMODULE_LSCDATA_LEN];
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__u16 lsc_gb[RKMODULE_LSCDATA_LEN];
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__u16 width;
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__u16 height;
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__u16 table_size;
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} __attribute__ ((packed));
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/**
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* enum rkmodule_af_dir - enum of module af otp direction
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*/
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enum rkmodele_af_otp_dir {
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AF_OTP_DIR_HORIZONTAL = 0,
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AF_OTP_DIR_UP = 1,
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AF_OTP_DIR_DOWN = 2,
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};
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/**
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* struct rkmodule_af_otp - module af otp in one direction
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*/
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struct rkmodule_af_otp {
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__u32 vcm_start;
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__u32 vcm_end;
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__u32 vcm_dir;
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};
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/**
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* struct rkmodule_af_inf - module af information
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*
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*/
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struct rkmodule_af_inf {
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__u32 flag;
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__u32 dir_cnt;
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struct rkmodule_af_otp af_otp[RKMODULE_AF_OTP_MAX_LEN];
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} __attribute__ ((packed));
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/**
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* struct rkmodule_pdaf_inf - module pdaf information
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*
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*/
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struct rkmodule_pdaf_inf {
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__u32 flag;
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__u32 gainmap_width;
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__u32 gainmap_height;
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__u32 dccmap_width;
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__u32 dccmap_height;
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__u32 dcc_mode;
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__u32 dcc_dir;
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__u32 pd_offset;
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__u16 gainmap[RKMODULE_PADF_GAINMAP_LEN];
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__u16 dccmap[RKMODULE_PDAF_DCCMAP_LEN];
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} __attribute__ ((packed));
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/**
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* struct rkmodule_otp_module_inf - otp module info
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*
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*/
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struct rkmodule_otp_module_inf {
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__u32 flag;
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__u8 vendor[8];
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__u32 module_id;
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__u16 version;
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__u16 full_width;
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__u16 full_height;
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__u8 supplier_id;
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__u8 year;
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__u8 mouth;
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__u8 day;
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__u8 sensor_id;
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__u8 lens_id;
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__u8 vcm_id;
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__u8 drv_id;
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__u8 flip;
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} __attribute__ ((packed));
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/**
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* struct rkmodule_inf - module information
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*
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*/
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struct rkmodule_inf {
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struct rkmodule_base_inf base;
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struct rkmodule_fac_inf fac;
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struct rkmodule_awb_inf awb;
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struct rkmodule_lsc_inf lsc;
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struct rkmodule_af_inf af;
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struct rkmodule_pdaf_inf pdaf;
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struct rkmodule_otp_module_inf module_inf;
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} __attribute__ ((packed));
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/**
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* struct rkmodule_awb_inf - module awb information
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*
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*/
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struct rkmodule_awb_cfg {
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__u32 enable;
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__u32 golden_r_value;
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__u32 golden_b_value;
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__u32 golden_gr_value;
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__u32 golden_gb_value;
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} __attribute__ ((packed));
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/**
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* struct rkmodule_af_cfg
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*
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*/
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struct rkmodule_af_cfg {
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__u32 enable;
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__u32 vcm_start;
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__u32 vcm_end;
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__u32 vcm_dir;
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} __attribute__ ((packed));
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/**
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* struct rkmodule_lsc_cfg
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*
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*/
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struct rkmodule_lsc_cfg {
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__u32 enable;
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} __attribute__ ((packed));
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/**
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* NO_HDR: linear mode
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* HDR_X2: hdr two frame or line mode
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* HDR_X3: hdr three or line mode
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* HDR_COMPR: linearised and compressed data for hdr
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*/
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enum rkmodule_hdr_mode {
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NO_HDR = 0,
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HDR_X2 = 5,
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HDR_X3 = 6,
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HDR_COMPR,
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};
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enum rkmodule_hdr_compr_segment {
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HDR_COMPR_SEGMENT_4 = 4,
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HDR_COMPR_SEGMENT_12 = 12,
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HDR_COMPR_SEGMENT_16 = 16,
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};
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/* rkmodule_hdr_compr
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* linearised and compressed data for hdr: data_src = K * data_compr + XX
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*
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* bit: bit of src data, max 20 bit.
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* segment: linear segment, support 4, 6 or 16.
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* k_shift: left shift bit of slop amplification factor, 2^k_shift, [0 15].
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* slope_k: K * 2^k_shift.
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* data_src_shitf: left shift bit of source data, data_src = 2^data_src_shitf
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* data_compr: compressed data.
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*/
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struct rkmodule_hdr_compr {
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enum rkmodule_hdr_compr_segment segment;
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__u8 bit;
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__u8 k_shift;
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__u8 data_src_shitf[HDR_COMPR_SEGMENT_16];
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__u16 data_compr[HDR_COMPR_SEGMENT_16];
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__u32 slope_k[HDR_COMPR_SEGMENT_16];
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};
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/**
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* HDR_NORMAL_VC: hdr frame with diff virtual channels
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* HDR_LINE_CNT: hdr frame with line counter
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* HDR_ID_CODE: hdr frame with identification code
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*/
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enum hdr_esp_mode {
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HDR_NORMAL_VC = 0,
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HDR_LINE_CNT,
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HDR_ID_CODE,
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};
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/*
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* CSI/DSI input select IOCTL
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*/
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enum rkmodule_csi_dsi_seq {
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RKMODULE_CSI_INPUT = 0,
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RKMODULE_DSI_INPUT,
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};
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/**
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* lcnt: line counter
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* padnum: the pixels of padding row
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* padpix: the payload of padding
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* idcd: identification code
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* efpix: identification code of Effective line
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* obpix: identification code of OB line
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*/
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struct rkmodule_hdr_esp {
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enum hdr_esp_mode mode;
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union {
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struct {
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__u32 padnum;
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__u32 padpix;
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} lcnt;
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struct {
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__u32 efpix;
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__u32 obpix;
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} idcd;
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} val;
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};
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struct rkmodule_hdr_cfg {
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__u32 hdr_mode;
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struct rkmodule_hdr_esp esp;
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struct rkmodule_hdr_compr compr;
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} __attribute__ ((packed));
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/* sensor lvds sync code
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* sav: start of active video codes
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* eav: end of active video codes
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*/
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struct rkmodule_sync_code {
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__u16 sav;
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__u16 eav;
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};
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/* sensor lvds difference sync code mode
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* LS_FIRST: valid line ls-le or sav-eav
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* invalid line fs-fe or sav-eav
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* FS_FIRST: valid line fs-le
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* invalid line ls-fe
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* ls: line start
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* le: line end
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* fs: frame start
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* fe: frame end
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* SONY_DOL_HDR_1: sony dol hdr pattern 1
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* SONY_DOL_HDR_2: sony dol hdr pattern 2
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*/
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enum rkmodule_lvds_mode {
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LS_FIRST = 0,
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FS_FIRST,
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SONY_DOL_HDR_1,
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SONY_DOL_HDR_2
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};
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/* sync code of different frame type (hdr or linear) for lvds
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* act: valid line sync code
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* blk: invalid line sync code
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*/
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struct rkmodule_lvds_frm_sync_code {
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struct rkmodule_sync_code act;
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struct rkmodule_sync_code blk;
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};
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/* sync code for lvds of sensor
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* odd_sync_code: sync code of odd frame id for lvds of sony sensor
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* even_sync_code: sync code of even frame id for lvds of sony sensor
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*/
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struct rkmodule_lvds_frame_sync_code {
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struct rkmodule_lvds_frm_sync_code odd_sync_code;
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struct rkmodule_lvds_frm_sync_code even_sync_code;
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};
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/* lvds sync code category of sensor for different operation */
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enum rkmodule_lvds_sync_code_group {
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LVDS_CODE_GRP_LINEAR = 0x0,
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LVDS_CODE_GRP_LONG,
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LVDS_CODE_GRP_MEDIUM,
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LVDS_CODE_GRP_SHORT,
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LVDS_CODE_GRP_MAX
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};
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/* struct rkmodule_lvds_cfg
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* frm_sync_code[index]:
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* index == LVDS_CODE_GRP_LONG:
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* sync code for frame of linear mode or for long frame of hdr mode
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* index == LVDS_CODE_GRP_MEDIUM:
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* sync code for medium long frame of hdr mode
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* index == LVDS_CODE_GRP_SHOR:
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* sync code for short long frame of hdr mode
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*/
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struct rkmodule_lvds_cfg {
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enum rkmodule_lvds_mode mode;
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struct rkmodule_lvds_frame_sync_code frm_sync_code[LVDS_CODE_GRP_MAX];
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} __attribute__ ((packed));
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/**
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* struct rkmodule_dpcc_cfg
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* enable: 0 -> disable dpcc, 1 -> enable multiple,
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* 2 -> enable single, 3 -> enable all;
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* cur_single_dpcc: the strength of single dpcc;
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* cur_multiple_dpcc: the strength of multiple dpcc;
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* total_dpcc: the max strength;
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*/
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struct rkmodule_dpcc_cfg {
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__u32 enable;
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__u32 cur_single_dpcc;
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__u32 cur_multiple_dpcc;
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__u32 total_dpcc;
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} __attribute__ ((packed));
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/**
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* nr switch by gain
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* direct: 0 -> up_thres LSNR to HSNR, 1 -> up_thres HSNR to LSNR
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* up_thres: threshold of nr change from low gain to high gain
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* down_thres: threshold of nr change from high gain to low gain;
|
* div_coeff: Coefficients converted from float to int
|
*/
|
struct rkmodule_nr_switch_threshold {
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__u32 direct;
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__u32 up_thres;
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__u32 down_thres;
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__u32 div_coeff;
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} __attribute__ ((packed));
|
|
/**
|
* enum rkmodule_bt656_intf_type
|
* to support sony bt656 raw
|
*/
|
enum rkmodule_bt656_intf_type {
|
BT656_STD_RAW = 0,
|
BT656_SONY_RAW,
|
};
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/**
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* struct rkmodule_vc_fmt_info - virtual channels fmt info
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*
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*/
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struct rkmodule_vc_fmt_info {
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__u32 width[RKMODULE_MAX_VC_CH];
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__u32 height[RKMODULE_MAX_VC_CH];
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__u32 fps[RKMODULE_MAX_VC_CH];
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} __attribute__ ((packed));
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/**
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* struct rkmodule_vc_hotplug_info - virtual channels hotplug status info
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* detect_status: hotplug status
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* bit 0~3 means channels id, value : 0 -> plug out, 1 -> plug in.
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*/
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struct rkmodule_vc_hotplug_info {
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__u8 detect_status;
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} __attribute__ ((packed));
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|
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/* sensor start stream sequence
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* RKMODULE_START_STREAM_DEFAULT: by default
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* RKMODULE_START_STREAM_BEHIND : sensor start stream should be behind the controller
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* RKMODULE_START_STREAM_FRONT : sensor start stream should be in front of the controller
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*/
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enum rkmodule_start_stream_seq {
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RKMODULE_START_STREAM_DEFAULT = 0,
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RKMODULE_START_STREAM_BEHIND,
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RKMODULE_START_STREAM_FRONT,
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};
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/*
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* HDMI to MIPI-CSI MODE IOCTL
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*/
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enum rkmodule_hdmiin_mode_seq {
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RKMODULE_HDMIIN_DEFAULT = 0,
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RKMODULE_HDMIIN_MODE,
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};
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/*
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* the causation to do cif reset work
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*/
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enum rkmodule_reset_src {
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RKCIF_RESET_SRC_NON = 0x0,
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RKCIF_RESET_SRC_ERR_CSI2,
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RKCIF_RESET_SRC_ERR_LVDS,
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RKICF_RESET_SRC_ERR_CUTOFF,
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RKCIF_RESET_SRC_ERR_HOTPLUG,
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RKCIF_RESET_SRC_ERR_APP,
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};
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struct rkmodule_vicap_reset_info {
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__u32 is_reset;
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enum rkmodule_reset_src src;
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} __attribute__ ((packed));
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struct rkmodule_bt656_mbus_info {
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__u32 flags;
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__u32 id_en_bits;
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} __attribute__ ((packed));
|
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/* DCG ratio (float) = integer + decimal / div_coeff */
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struct rkmodule_dcg_ratio {
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__u32 integer;
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__u32 decimal;
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__u32 div_coeff;
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};
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struct rkmodule_channel_info {
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__u32 index;
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__u32 vc;
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__u32 width;
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__u32 height;
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__u32 bus_fmt;
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__u32 data_type;
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__u32 data_bit;
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} __attribute__ ((packed));
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/*
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* link to vicap
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* linear mode: pad0~pad3 for id0~id3;
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*
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* HDR_X2: id0 fiexd to vc0 for long frame
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* id1 fixed to vc1 for short frame;
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* id2~id3 reserved, can config by PAD2~PAD3
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*
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* HDR_X3: id0 fiexd to vc0 for long frame
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* id1 fixed to vc1 for middle frame
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* id2 fixed to vc2 for short frame;
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* id3 reserved, can config by PAD3
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*
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* link to isp, the connection relationship is as follows
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*/
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enum rkmodule_max_pad {
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PAD0, /* link to isp */
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PAD1, /* link to csi wr0 | hdr x2:L x3:M */
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PAD2, /* link to csi wr1 | hdr x3:L */
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PAD3, /* link to csi wr2 | hdr x2:M x3:S */
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PAD_MAX,
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};
|
|
/*
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* sensor exposure sync mode
|
*/
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enum rkmodule_sync_mode {
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NO_SYNC_MODE = 0,
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EXTERNAL_MASTER_MODE,
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INTERNAL_MASTER_MODE,
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SLAVE_MODE,
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};
|
|
struct rkmodule_mclk_data {
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__u32 enable;
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__u32 mclk_index;
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__u32 mclk_rate;
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__u32 reserved[8];
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};
|
|
/*
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* csi dphy param
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* lp_vol_ref -> Reference voltage-645mV for LP Function control pin
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* for rk3588 dcphy
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* 3'b000 : 605mV
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* 3'b001 : 625mV
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* 3'b010 : 635mV
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* 3'b011 : 645mV
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* 3'b100 : 655mV
|
* 3'b101 : 665mV
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* 3'b110 : 685mV
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* 3'b111 : 725mV
|
*
|
* lp_hys_sw -> LP-RX Hysteresis Level Control
|
* for rk3588 dcphy
|
* 2'b00=45mV
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* 2'b01=65mV
|
* 2'b10=85mV
|
* 2'b11=100mV
|
*
|
* lp_escclk_pol_sel -> LP ESCCLK Polarity sel
|
* for rk3588 dcphy
|
* 1'b0: normal
|
* 1'b1: swap ,Increase 1ns delay
|
*
|
* skew_data_cal_clk -> Skew Calibration Manual Data Fine Delay Control Register
|
* for rk3588 dcphy
|
* BIT[4:0] 30ps a step
|
*
|
* clk_hs_term_sel/data_hs_term_sel -> HS-RX Termination Impedance Control
|
* for rk3588 dcphy
|
* 3b'000 : 102Ω
|
* 3b'001 : 99.1Ω
|
* 3b'010 : 96.6Ω (default)
|
* 3b'011 : 94.1Ω
|
* 3b'100 : 113Ω
|
* 3b'101 : 110Ω
|
* 3b'110 : 107Ω
|
* 3b'111 : 104Ω
|
*/
|
|
enum csi2_dphy_vendor {
|
PHY_VENDOR_INNO = 0x0,
|
PHY_VENDOR_SAMSUNG = 0x01,
|
};
|
|
struct rkmodule_csi_dphy_param {
|
__u32 vendor;
|
__u32 lp_vol_ref;
|
__u32 lp_hys_sw[DPHY_MAX_LANE];
|
__u32 lp_escclk_pol_sel[DPHY_MAX_LANE];
|
__u32 skew_data_cal_clk[DPHY_MAX_LANE];
|
__u32 clk_hs_term_sel;
|
__u32 data_hs_term_sel[DPHY_MAX_LANE];
|
__u32 reserved[32];
|
};
|
|
struct rkmodule_sensor_fmt {
|
__u32 sensor_index;
|
__u32 sensor_width;
|
__u32 sensor_height;
|
};
|
|
struct rkmodule_sensor_infos {
|
struct rkmodule_sensor_fmt sensor_fmt[RKMODULE_MAX_SENSOR_NUM];
|
};
|
|
enum rkmodule_capture_mode {
|
RKMODULE_CAPTURE_MODE_NONE = 0,
|
RKMODULE_MULTI_DEV_COMBINE_ONE,
|
RKMODULE_ONE_CH_TO_MULTI_ISP,
|
RKMODULE_MULTI_CH_TO_MULTI_ISP,
|
RKMODULE_MULTI_CH_COMBINE_SQUARE,
|
};
|
|
struct rkmodule_multi_dev_info {
|
__u32 dev_idx[RKMODULE_MULTI_DEV_NUM];
|
__u32 combine_idx[RKMODULE_MULTI_DEV_NUM];
|
__u32 pixel_offset;
|
__u32 dev_num;
|
__u32 reserved[8];
|
};
|
|
struct rkmodule_one_to_multi_info {
|
__u32 isp_num;
|
__u32 frame_pattern[RKMODULE_MULTI_DEV_NUM];
|
};
|
|
struct rkmodule_multi_combine_info {
|
__u32 combine_num;
|
__u32 combine_index[RKMODULE_MULTI_DEV_NUM];
|
};
|
|
struct rkmodule_capture_info {
|
__u32 mode;
|
union {
|
struct rkmodule_multi_dev_info multi_dev;
|
struct rkmodule_one_to_multi_info one_to_multi;
|
struct rkmodule_multi_combine_info multi_combine_info;
|
};
|
};
|
|
#endif /* _UAPI_RKMODULE_CAMERA_H */
|
