/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _LINUX_GPIO_REGMAP_H
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#define _LINUX_GPIO_REGMAP_H
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struct device;
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struct gpio_regmap;
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struct irq_domain;
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struct regmap;
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#define GPIO_REGMAP_ADDR_ZERO ((unsigned int)(-1))
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#define GPIO_REGMAP_ADDR(addr) ((addr) ? : GPIO_REGMAP_ADDR_ZERO)
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/**
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* struct gpio_regmap_config - Description of a generic regmap gpio_chip.
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* @parent: The parent device
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* @regmap: The regmap used to access the registers
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* given, the name of the device is used
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* @label: (Optional) Descriptive name for GPIO controller.
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* If not given, the name of the device is used.
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* @ngpio: Number of GPIOs
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* @names: (Optional) Array of names for gpios
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* @reg_dat_base: (Optional) (in) register base address
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* @reg_set_base: (Optional) set register base address
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* @reg_clr_base: (Optional) clear register base address
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* @reg_dir_in_base: (Optional) in setting register base address
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* @reg_dir_out_base: (Optional) out setting register base address
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* @reg_stride: (Optional) May be set if the registers (of the
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* same type, dat, set, etc) are not consecutive.
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* @ngpio_per_reg: Number of GPIOs per register
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* @irq_domain: (Optional) IRQ domain if the controller is
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* interrupt-capable
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* @reg_mask_xlate: (Optional) Translates base address and GPIO
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* offset to a register/bitmask pair. If not
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* given the default gpio_regmap_simple_xlate()
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* is used.
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*
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* The ->reg_mask_xlate translates a given base address and GPIO offset to
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* register and mask pair. The base address is one of the given register
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* base addresses in this structure.
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*
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* Although all register base addresses are marked as optional, there are
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* several rules:
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* 1. if you only have @reg_dat_base set, then it is input-only
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* 2. if you only have @reg_set_base set, then it is output-only
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* 3. if you have either @reg_dir_in_base or @reg_dir_out_base set, then
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* you have to set both @reg_dat_base and @reg_set_base
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* 4. if you have @reg_set_base set, you may also set @reg_clr_base to have
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* two different registers for setting and clearing the output. This is
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* also valid for the output-only case.
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* 5. @reg_dir_in_base and @reg_dir_out_base are exclusive; is there really
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* hardware which has redundant registers?
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*
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* Note: All base addresses may have the special value %GPIO_REGMAP_ADDR_ZERO
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* which forces the address to the value 0.
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*/
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struct gpio_regmap_config {
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struct device *parent;
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struct regmap *regmap;
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const char *label;
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int ngpio;
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const char *const *names;
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unsigned int reg_dat_base;
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unsigned int reg_set_base;
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unsigned int reg_clr_base;
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unsigned int reg_dir_in_base;
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unsigned int reg_dir_out_base;
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int reg_stride;
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int ngpio_per_reg;
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struct irq_domain *irq_domain;
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int (*reg_mask_xlate)(struct gpio_regmap *gpio, unsigned int base,
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unsigned int offset, unsigned int *reg,
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unsigned int *mask);
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};
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struct gpio_regmap *gpio_regmap_register(const struct gpio_regmap_config *config);
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void gpio_regmap_unregister(struct gpio_regmap *gpio);
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struct gpio_regmap *devm_gpio_regmap_register(struct device *dev,
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const struct gpio_regmap_config *config);
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void gpio_regmap_set_drvdata(struct gpio_regmap *gpio, void *data);
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void *gpio_regmap_get_drvdata(struct gpio_regmap *gpio);
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#endif /* _LINUX_GPIO_REGMAP_H */
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