/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef LINUX_BCMA_DRIVER_GMAC_CMN_H_
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#define LINUX_BCMA_DRIVER_GMAC_CMN_H_
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#include <linux/types.h>
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#define BCMA_GMAC_CMN_STAG0 0x000
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#define BCMA_GMAC_CMN_STAG1 0x004
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#define BCMA_GMAC_CMN_STAG2 0x008
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#define BCMA_GMAC_CMN_STAG3 0x00C
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#define BCMA_GMAC_CMN_PARSER_CTL 0x020
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#define BCMA_GMAC_CMN_MIB_MAX_LEN 0x024
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#define BCMA_GMAC_CMN_PHY_ACCESS 0x100
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#define BCMA_GMAC_CMN_PA_DATA_MASK 0x0000ffff
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#define BCMA_GMAC_CMN_PA_ADDR_MASK 0x001f0000
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#define BCMA_GMAC_CMN_PA_ADDR_SHIFT 16
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#define BCMA_GMAC_CMN_PA_REG_MASK 0x1f000000
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#define BCMA_GMAC_CMN_PA_REG_SHIFT 24
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#define BCMA_GMAC_CMN_PA_WRITE 0x20000000
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#define BCMA_GMAC_CMN_PA_START 0x40000000
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#define BCMA_GMAC_CMN_PHY_CTL 0x104
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#define BCMA_GMAC_CMN_PC_EPA_MASK 0x0000001f
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#define BCMA_GMAC_CMN_PC_MCT_MASK 0x007f0000
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#define BCMA_GMAC_CMN_PC_MCT_SHIFT 16
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#define BCMA_GMAC_CMN_PC_MTE 0x00800000
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#define BCMA_GMAC_CMN_GMAC0_RGMII_CTL 0x110
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#define BCMA_GMAC_CMN_CFP_ACCESS 0x200
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#define BCMA_GMAC_CMN_CFP_TCAM_DATA0 0x210
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#define BCMA_GMAC_CMN_CFP_TCAM_DATA1 0x214
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#define BCMA_GMAC_CMN_CFP_TCAM_DATA2 0x218
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#define BCMA_GMAC_CMN_CFP_TCAM_DATA3 0x21C
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#define BCMA_GMAC_CMN_CFP_TCAM_DATA4 0x220
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#define BCMA_GMAC_CMN_CFP_TCAM_DATA5 0x224
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#define BCMA_GMAC_CMN_CFP_TCAM_DATA6 0x228
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#define BCMA_GMAC_CMN_CFP_TCAM_DATA7 0x22C
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#define BCMA_GMAC_CMN_CFP_TCAM_MASK0 0x230
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#define BCMA_GMAC_CMN_CFP_TCAM_MASK1 0x234
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#define BCMA_GMAC_CMN_CFP_TCAM_MASK2 0x238
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#define BCMA_GMAC_CMN_CFP_TCAM_MASK3 0x23C
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#define BCMA_GMAC_CMN_CFP_TCAM_MASK4 0x240
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#define BCMA_GMAC_CMN_CFP_TCAM_MASK5 0x244
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#define BCMA_GMAC_CMN_CFP_TCAM_MASK6 0x248
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#define BCMA_GMAC_CMN_CFP_TCAM_MASK7 0x24C
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#define BCMA_GMAC_CMN_CFP_ACTION_DATA 0x250
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#define BCMA_GMAC_CMN_TCAM_BIST_CTL 0x2A0
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#define BCMA_GMAC_CMN_TCAM_BIST_STATUS 0x2A4
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#define BCMA_GMAC_CMN_TCAM_CMP_STATUS 0x2A8
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#define BCMA_GMAC_CMN_TCAM_DISABLE 0x2AC
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#define BCMA_GMAC_CMN_TCAM_TEST_CTL 0x2F0
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#define BCMA_GMAC_CMN_UDF_0_A3_A0 0x300
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#define BCMA_GMAC_CMN_UDF_0_A7_A4 0x304
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#define BCMA_GMAC_CMN_UDF_0_A8 0x308
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#define BCMA_GMAC_CMN_UDF_1_A3_A0 0x310
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#define BCMA_GMAC_CMN_UDF_1_A7_A4 0x314
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#define BCMA_GMAC_CMN_UDF_1_A8 0x318
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#define BCMA_GMAC_CMN_UDF_2_A3_A0 0x320
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#define BCMA_GMAC_CMN_UDF_2_A7_A4 0x324
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#define BCMA_GMAC_CMN_UDF_2_A8 0x328
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#define BCMA_GMAC_CMN_UDF_0_B3_B0 0x330
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#define BCMA_GMAC_CMN_UDF_0_B7_B4 0x334
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#define BCMA_GMAC_CMN_UDF_0_B8 0x338
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#define BCMA_GMAC_CMN_UDF_1_B3_B0 0x340
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#define BCMA_GMAC_CMN_UDF_1_B7_B4 0x344
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#define BCMA_GMAC_CMN_UDF_1_B8 0x348
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#define BCMA_GMAC_CMN_UDF_2_B3_B0 0x350
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#define BCMA_GMAC_CMN_UDF_2_B7_B4 0x354
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#define BCMA_GMAC_CMN_UDF_2_B8 0x358
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#define BCMA_GMAC_CMN_UDF_0_C3_C0 0x360
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#define BCMA_GMAC_CMN_UDF_0_C7_C4 0x364
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#define BCMA_GMAC_CMN_UDF_0_C8 0x368
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#define BCMA_GMAC_CMN_UDF_1_C3_C0 0x370
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#define BCMA_GMAC_CMN_UDF_1_C7_C4 0x374
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#define BCMA_GMAC_CMN_UDF_1_C8 0x378
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#define BCMA_GMAC_CMN_UDF_2_C3_C0 0x380
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#define BCMA_GMAC_CMN_UDF_2_C7_C4 0x384
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#define BCMA_GMAC_CMN_UDF_2_C8 0x388
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#define BCMA_GMAC_CMN_UDF_0_D3_D0 0x390
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#define BCMA_GMAC_CMN_UDF_0_D7_D4 0x394
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#define BCMA_GMAC_CMN_UDF_0_D11_D8 0x394
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struct bcma_drv_gmac_cmn {
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struct bcma_device *core;
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/* Drivers accessing BCMA_GMAC_CMN_PHY_ACCESS and
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* BCMA_GMAC_CMN_PHY_CTL need to take that mutex first. */
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struct mutex phy_mutex;
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};
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/* Register access */
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#define gmac_cmn_read16(gc, offset) bcma_read16((gc)->core, offset)
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#define gmac_cmn_read32(gc, offset) bcma_read32((gc)->core, offset)
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#define gmac_cmn_write16(gc, offset, val) bcma_write16((gc)->core, offset, val)
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#define gmac_cmn_write32(gc, offset, val) bcma_write32((gc)->core, offset, val)
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#endif /* LINUX_BCMA_DRIVER_GMAC_CMN_H_ */
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