/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Definitions for TI EMIF device platform data
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*
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* Copyright (C) 2012 Texas Instruments, Inc.
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*
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* Aneesh V <aneesh@ti.com>
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*/
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#ifndef __EMIF_PLAT_H
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#define __EMIF_PLAT_H
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/* Low power modes - EMIF_PWR_MGMT_CTRL */
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#define EMIF_LP_MODE_DISABLE 0
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#define EMIF_LP_MODE_CLOCK_STOP 1
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#define EMIF_LP_MODE_SELF_REFRESH 2
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#define EMIF_LP_MODE_PWR_DN 4
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/* Hardware capabilities */
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#define EMIF_HW_CAPS_LL_INTERFACE 0x00000001
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/*
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* EMIF IP Revisions
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* EMIF4D - Used in OMAP4
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* EMIF4D5 - Used in OMAP5
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*/
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#define EMIF_4D 1
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#define EMIF_4D5 2
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/*
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* PHY types
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* ATTILAPHY - Used in OMAP4
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* INTELLIPHY - Used in OMAP5
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*/
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#define EMIF_PHY_TYPE_ATTILAPHY 1
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#define EMIF_PHY_TYPE_INTELLIPHY 2
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/* Custom config requests */
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#define EMIF_CUSTOM_CONFIG_LPMODE 0x00000001
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#define EMIF_CUSTOM_CONFIG_TEMP_ALERT_POLL_INTERVAL 0x00000002
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#define EMIF_CUSTOM_CONFIG_EXTENDED_TEMP_PART 0x00000004
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#ifndef __ASSEMBLY__
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/**
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* struct ddr_device_info - All information about the DDR device except AC
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* timing parameters
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* @type: Device type (LPDDR2-S4, LPDDR2-S2 etc)
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* @density: Device density
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* @io_width: Bus width
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* @cs1_used: Whether there is a DDR device attached to the second
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* chip-select(CS1) of this EMIF instance
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* @cal_resistors_per_cs: Whether there is one calibration resistor per
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* chip-select or whether it's a single one for both
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* @manufacturer: Manufacturer name string
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*/
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struct ddr_device_info {
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u32 type;
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u32 density;
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u32 io_width;
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u32 cs1_used;
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u32 cal_resistors_per_cs;
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char manufacturer[10];
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};
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/**
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* struct emif_custom_configs - Custom configuration parameters/policies
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* passed from the platform layer
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* @mask: Mask to indicate which configs are requested
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* @lpmode: LPMODE to be used in PWR_MGMT_CTRL register
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* @lpmode_timeout_performance: Timeout before LPMODE entry when higher
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* performance is desired at the cost of power (typically
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* at higher OPPs)
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* @lpmode_timeout_power: Timeout before LPMODE entry when better power
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* savings is desired and performance is not important
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* (typically at lower loads indicated by lower OPPs)
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* @lpmode_freq_threshold: The DDR frequency threshold to identify between
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* the above two cases:
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* timeout = (freq >= lpmode_freq_threshold) ?
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* lpmode_timeout_performance :
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* lpmode_timeout_power;
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* @temp_alert_poll_interval_ms: LPDDR2 MR4 polling interval at nominal
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* temperature(in milliseconds). When temperature is high
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* polling is done 4 times as frequently.
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*/
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struct emif_custom_configs {
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u32 mask;
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u32 lpmode;
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u32 lpmode_timeout_performance;
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u32 lpmode_timeout_power;
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u32 lpmode_freq_threshold;
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u32 temp_alert_poll_interval_ms;
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};
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/**
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* struct emif_platform_data - Platform data passed on EMIF platform
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* device creation. Used by the driver.
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* @hw_caps: Hw capabilities of the EMIF IP in the respective SoC
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* @device_info: Device info structure containing information such
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* as type, bus width, density etc
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* @timings: Timings information from device datasheet passed
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* as an array of 'struct lpddr2_timings'. Can be NULL
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* if if default timings are ok
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* @timings_arr_size: Size of the timings array. Depends on the number
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* of different frequencies for which timings data
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* is provided
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* @min_tck: Minimum value of some timing parameters in terms
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* of number of cycles. Can be NULL if default values
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* are ok
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* @custom_configs: Custom configurations requested by SoC or board
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* code and the data for them. Can be NULL if default
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* configurations done by the driver are ok. See
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* documentation for 'struct emif_custom_configs' for
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* more details
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*/
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struct emif_platform_data {
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u32 hw_caps;
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struct ddr_device_info *device_info;
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const struct lpddr2_timings *timings;
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u32 timings_arr_size;
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const struct lpddr2_min_tck *min_tck;
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struct emif_custom_configs *custom_configs;
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u32 ip_rev;
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u32 phy_type;
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};
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#endif /* __ASSEMBLY__ */
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#endif /* __LINUX_EMIF_H */
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