/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* include/linux/irqchip/arm-gic-common.h
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*
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* Copyright (C) 2016 ARM Limited, All Rights Reserved.
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*/
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#ifndef __LINUX_IRQCHIP_ARM_GIC_COMMON_H
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#define __LINUX_IRQCHIP_ARM_GIC_COMMON_H
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#include <linux/types.h>
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#include <linux/ioport.h>
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#define GICD_INT_DEF_PRI 0xa0
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#define GICD_INT_DEF_PRI_X4 ((GICD_INT_DEF_PRI << 24) |\
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(GICD_INT_DEF_PRI << 16) |\
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(GICD_INT_DEF_PRI << 8) |\
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GICD_INT_DEF_PRI)
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enum gic_type {
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GIC_V2,
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GIC_V3,
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};
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struct gic_kvm_info {
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/* GIC type */
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enum gic_type type;
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/* Virtual CPU interface */
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struct resource vcpu;
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/* Interrupt number */
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unsigned int maint_irq;
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/* Virtual control interface */
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struct resource vctrl;
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/* vlpi support */
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bool has_v4;
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/* rvpeid support */
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bool has_v4_1;
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};
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const struct gic_kvm_info *gic_get_kvm_info(void);
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struct irq_domain;
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struct fwnode_handle;
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int gicv2m_init(struct fwnode_handle *parent_handle,
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struct irq_domain *parent);
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#endif /* __LINUX_IRQCHIP_ARM_GIC_COMMON_H */
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