/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __QCOM_SMD_RPM_H__
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#define __QCOM_SMD_RPM_H__
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struct qcom_smd_rpm;
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#define QCOM_SMD_RPM_ACTIVE_STATE 0
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#define QCOM_SMD_RPM_SLEEP_STATE 1
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/*
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* Constants used for addressing resources in the RPM.
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*/
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#define QCOM_SMD_RPM_BBYB 0x62796262
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#define QCOM_SMD_RPM_BOBB 0x62626f62
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#define QCOM_SMD_RPM_BOOST 0x61747362
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#define QCOM_SMD_RPM_BUS_CLK 0x316b6c63
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#define QCOM_SMD_RPM_BUS_MASTER 0x73616d62
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#define QCOM_SMD_RPM_BUS_SLAVE 0x766c7362
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#define QCOM_SMD_RPM_CLK_BUF_A 0x616B6C63
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#define QCOM_SMD_RPM_LDOA 0x616f646c
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#define QCOM_SMD_RPM_LDOB 0x626F646C
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#define QCOM_SMD_RPM_RWCX 0x78637772
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#define QCOM_SMD_RPM_RWMX 0x786d7772
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#define QCOM_SMD_RPM_RWLC 0x636c7772
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#define QCOM_SMD_RPM_RWLM 0x6d6c7772
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#define QCOM_SMD_RPM_MEM_CLK 0x326b6c63
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#define QCOM_SMD_RPM_MISC_CLK 0x306b6c63
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#define QCOM_SMD_RPM_NCPA 0x6170636E
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#define QCOM_SMD_RPM_NCPB 0x6270636E
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#define QCOM_SMD_RPM_OCMEM_PWR 0x706d636f
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#define QCOM_SMD_RPM_QPIC_CLK 0x63697071
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#define QCOM_SMD_RPM_SMPA 0x61706d73
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#define QCOM_SMD_RPM_SMPB 0x62706d73
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#define QCOM_SMD_RPM_SPDM 0x63707362
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#define QCOM_SMD_RPM_VSA 0x00617376
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#define QCOM_SMD_RPM_MMAXI_CLK 0x69786d6d
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#define QCOM_SMD_RPM_IPA_CLK 0x617069
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#define QCOM_SMD_RPM_CE_CLK 0x6563
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#define QCOM_SMD_RPM_AGGR_CLK 0x72676761
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int qcom_rpm_smd_write(struct qcom_smd_rpm *rpm,
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int state,
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u32 resource_type, u32 resource_id,
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void *buf, size_t count);
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#endif
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