/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef LINUX_BCMA_DRIVER_MIPS_H_
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#define LINUX_BCMA_DRIVER_MIPS_H_
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#define BCMA_MIPS_IPSFLAG 0x0F08
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/* which sbflags get routed to mips interrupt 1 */
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#define BCMA_MIPS_IPSFLAG_IRQ1 0x0000003F
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#define BCMA_MIPS_IPSFLAG_IRQ1_SHIFT 0
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/* which sbflags get routed to mips interrupt 2 */
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#define BCMA_MIPS_IPSFLAG_IRQ2 0x00003F00
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#define BCMA_MIPS_IPSFLAG_IRQ2_SHIFT 8
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/* which sbflags get routed to mips interrupt 3 */
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#define BCMA_MIPS_IPSFLAG_IRQ3 0x003F0000
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#define BCMA_MIPS_IPSFLAG_IRQ3_SHIFT 16
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/* which sbflags get routed to mips interrupt 4 */
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#define BCMA_MIPS_IPSFLAG_IRQ4 0x3F000000
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#define BCMA_MIPS_IPSFLAG_IRQ4_SHIFT 24
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/* MIPS 74K core registers */
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#define BCMA_MIPS_MIPS74K_CORECTL 0x0000
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#define BCMA_MIPS_MIPS74K_EXCEPTBASE 0x0004
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#define BCMA_MIPS_MIPS74K_BIST 0x000C
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#define BCMA_MIPS_MIPS74K_INTMASK_INT0 0x0014
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#define BCMA_MIPS_MIPS74K_INTMASK(int) \
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((int) * 4 + BCMA_MIPS_MIPS74K_INTMASK_INT0)
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#define BCMA_MIPS_MIPS74K_NMIMASK 0x002C
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#define BCMA_MIPS_MIPS74K_GPIOSEL 0x0040
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#define BCMA_MIPS_MIPS74K_GPIOOUT 0x0044
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#define BCMA_MIPS_MIPS74K_GPIOEN 0x0048
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#define BCMA_MIPS_MIPS74K_CLKCTLST 0x01E0
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#define BCMA_MIPS_OOBSELINA74 0x004
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#define BCMA_MIPS_OOBSELOUTA30 0x100
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struct bcma_device;
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struct bcma_drv_mips {
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struct bcma_device *core;
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u8 setup_done:1;
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u8 early_setup_done:1;
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};
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extern u32 bcma_cpu_clock(struct bcma_drv_mips *mcore);
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#endif /* LINUX_BCMA_DRIVER_MIPS_H_ */
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