/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __SPARC64_SWITCH_TO_64_H
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#define __SPARC64_SWITCH_TO_64_H
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#include <asm/visasm.h>
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#define prepare_arch_switch(next) \
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do { \
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flushw_all(); \
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} while (0)
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/* See what happens when you design the chip correctly?
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*
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* We tell gcc we clobber all non-fixed-usage registers except
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* for l0/l1. It will use one for 'next' and the other to hold
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* the output value of 'last'. 'next' is not referenced again
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* past the invocation of switch_to in the scheduler, so we need
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* not preserve it's value. Hairy, but it lets us remove 2 loads
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* and 2 stores in this critical code path. -DaveM
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*/
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#define switch_to(prev, next, last) \
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do { save_and_clear_fpu(); \
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/* If you are tempted to conditionalize the following */ \
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/* so that ASI is only written if it changes, think again. */ \
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__asm__ __volatile__("wr %%g0, %0, %%asi" \
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: : "r" (task_thread_info(next)->current_ds));\
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trap_block[current_thread_info()->cpu].thread = \
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task_thread_info(next); \
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__asm__ __volatile__( \
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"mov %%g4, %%g7\n\t" \
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"stx %%i6, [%%sp + 2047 + 0x70]\n\t" \
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"stx %%i7, [%%sp + 2047 + 0x78]\n\t" \
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"rdpr %%wstate, %%o5\n\t" \
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"stx %%o6, [%%g6 + %6]\n\t" \
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"stb %%o5, [%%g6 + %5]\n\t" \
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"rdpr %%cwp, %%o5\n\t" \
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"stb %%o5, [%%g6 + %8]\n\t" \
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"wrpr %%g0, 15, %%pil\n\t" \
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"mov %4, %%g6\n\t" \
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"ldub [%4 + %8], %%g1\n\t" \
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"wrpr %%g1, %%cwp\n\t" \
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"ldx [%%g6 + %6], %%o6\n\t" \
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"ldub [%%g6 + %5], %%o5\n\t" \
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"ldub [%%g6 + %7], %%o7\n\t" \
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"wrpr %%o5, 0x0, %%wstate\n\t" \
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"ldx [%%sp + 2047 + 0x70], %%i6\n\t" \
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"ldx [%%sp + 2047 + 0x78], %%i7\n\t" \
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"ldx [%%g6 + %9], %%g4\n\t" \
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"wrpr %%g0, 14, %%pil\n\t" \
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"brz,pt %%o7, switch_to_pc\n\t" \
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" mov %%g7, %0\n\t" \
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"sethi %%hi(ret_from_fork), %%g1\n\t" \
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"jmpl %%g1 + %%lo(ret_from_fork), %%g0\n\t" \
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" nop\n\t" \
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".globl switch_to_pc\n\t" \
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"switch_to_pc:\n\t" \
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: "=&r" (last), "=r" (current), "=r" (current_thread_info_reg), \
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"=r" (__local_per_cpu_offset) \
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: "0" (task_thread_info(next)), \
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"i" (TI_WSTATE), "i" (TI_KSP), "i" (TI_NEW_CHILD), \
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"i" (TI_CWP), "i" (TI_TASK) \
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: "cc", \
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"g1", "g2", "g3", "g7", \
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"l1", "l2", "l3", "l4", "l5", "l6", "l7", \
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"i0", "i1", "i2", "i3", "i4", "i5", \
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"o0", "o1", "o2", "o3", "o4", "o5", "o7"); \
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} while(0)
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void synchronize_user_stack(void);
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struct pt_regs;
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void fault_in_user_windows(struct pt_regs *);
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#endif /* __SPARC64_SWITCH_TO_64_H */
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