/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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/*
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*
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* (C) COPYRIGHT 2022 ARM Limited. All rights reserved.
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*
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* This program is free software and is provided to you under the terms of the
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* GNU General Public License version 2 as published by the Free Software
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* Foundation, and any use by you of this program is subject to the terms
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* of such GNU license.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you can access it online at
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* http://www.gnu.org/licenses/gpl-2.0.html.
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*
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*/
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#ifndef _KBASE_DEBUG_CORESIGHT_CSF_
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#define _KBASE_DEBUG_CORESIGHT_CSF_
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#include <linux/types.h>
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#include <linux/list.h>
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#define KBASE_DEBUG_CORESIGHT_CSF_OP_TYPE_NOP 0U
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#define KBASE_DEBUG_CORESIGHT_CSF_OP_TYPE_WRITE_IMM 1U
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#define KBASE_DEBUG_CORESIGHT_CSF_OP_TYPE_WRITE_IMM_RANGE 2U
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#define KBASE_DEBUG_CORESIGHT_CSF_OP_TYPE_WRITE 3U
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#define KBASE_DEBUG_CORESIGHT_CSF_OP_TYPE_READ 4U
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#define KBASE_DEBUG_CORESIGHT_CSF_OP_TYPE_POLL 5U
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#define KBASE_DEBUG_CORESIGHT_CSF_OP_TYPE_BIT_OR 6U
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#define KBASE_DEBUG_CORESIGHT_CSF_OP_TYPE_BIT_XOR 7U
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#define KBASE_DEBUG_CORESIGHT_CSF_OP_TYPE_BIT_AND 8U
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#define KBASE_DEBUG_CORESIGHT_CSF_OP_TYPE_BIT_NOT 9U
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/**
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* struct kbase_debug_coresight_csf_write_imm_op - Coresight immediate write operation structure
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*
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* @reg_addr: Register address to write to.
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* @val: Value to write at @reg_addr.
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*/
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struct kbase_debug_coresight_csf_write_imm_op {
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__u32 reg_addr;
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__u32 val;
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};
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/**
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* struct kbase_debug_coresight_csf_write_imm_range_op - Coresight immediate write range
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* operation structure
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*
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* @reg_start: Register address to start writing from.
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* @reg_end: Register address to stop writing from. End address included in the write range.
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* @val: Value to write at @reg_addr.
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*/
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struct kbase_debug_coresight_csf_write_imm_range_op {
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__u32 reg_start;
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__u32 reg_end;
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__u32 val;
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};
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/**
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* struct kbase_debug_coresight_csf_write_op - Coresight write operation structure
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*
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* @reg_addr: Register address to write to.
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* @ptr: Pointer to the value to write at @reg_addr.
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*/
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struct kbase_debug_coresight_csf_write_op {
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__u32 reg_addr;
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__u32 *ptr;
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};
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/**
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* struct kbase_debug_coresight_csf_read_op - Coresight read operation structure
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*
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* @reg_addr: Register address to read.
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* @ptr: Pointer where to store the read value.
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*/
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struct kbase_debug_coresight_csf_read_op {
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__u32 reg_addr;
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__u32 *ptr;
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};
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/**
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* struct kbase_debug_coresight_csf_poll_op - Coresight poll operation structure
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*
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* @reg_addr: Register address to poll.
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* @val: Expected value after poll.
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* @mask: Mask to apply on the read value from @reg_addr when comparing against @val.
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*/
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struct kbase_debug_coresight_csf_poll_op {
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__u32 reg_addr;
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__u32 val;
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__u32 mask;
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};
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/**
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* struct kbase_debug_coresight_csf_bitw_op - Coresight bitwise operation structure
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*
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* @ptr: Pointer to the variable on which to execute the bit operation.
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* @val: Value with which the operation should be executed against @ptr value.
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*/
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struct kbase_debug_coresight_csf_bitw_op {
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__u32 *ptr;
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__u32 val;
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};
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/**
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* struct kbase_debug_coresight_csf_op - Coresight supported operations
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*
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* @type: Operation type.
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* @padding: Padding for 64bit alignment.
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* @op: Operation union.
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* @op.write_imm: Parameters for immediate write operation.
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* @op.write_imm_range: Parameters for immediate range write operation.
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* @op.write: Parameters for write operation.
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* @op.read: Parameters for read operation.
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* @op.poll: Parameters for poll operation.
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* @op.bitw: Parameters for bitwise operation.
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* @op.padding: Padding for 64bit alignment.
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*
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* All operation structures should include padding to ensure they are the same size.
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*/
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struct kbase_debug_coresight_csf_op {
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__u8 type;
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__u8 padding[7];
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union {
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struct kbase_debug_coresight_csf_write_imm_op write_imm;
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struct kbase_debug_coresight_csf_write_imm_range_op write_imm_range;
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struct kbase_debug_coresight_csf_write_op write;
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struct kbase_debug_coresight_csf_read_op read;
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struct kbase_debug_coresight_csf_poll_op poll;
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struct kbase_debug_coresight_csf_bitw_op bitw;
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u32 padding[3];
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} op;
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};
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/**
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* struct kbase_debug_coresight_csf_sequence - Coresight sequence of operations
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*
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* @ops: Arrays containing Coresight operations.
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* @nr_ops: Size of @ops.
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*/
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struct kbase_debug_coresight_csf_sequence {
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struct kbase_debug_coresight_csf_op *ops;
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int nr_ops;
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};
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/**
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* struct kbase_debug_coresight_csf_address_range - Coresight client address range
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*
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* @start: Start offset of the address range.
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* @end: End offset of the address range.
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*/
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struct kbase_debug_coresight_csf_address_range {
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__u32 start;
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__u32 end;
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};
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/**
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* kbase_debug_coresight_csf_register - Register as a client for set ranges of MCU memory.
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*
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* @drv_data: Pointer to driver device data.
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* @ranges: Pointer to an array of struct kbase_debug_coresight_csf_address_range
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* that contains start and end addresses that the client will manage.
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* @nr_ranges: Size of @ranges array.
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*
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* This function checks @ranges against current client claimed ranges. If there
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* are no overlaps, a new client is created and added to the list.
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*
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* Return: A pointer of the registered client instance on success. NULL on failure.
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*/
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void *kbase_debug_coresight_csf_register(void *drv_data,
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struct kbase_debug_coresight_csf_address_range *ranges,
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int nr_ranges);
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/**
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* kbase_debug_coresight_csf_unregister - Removes a coresight client.
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*
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* @client_data: A pointer to a coresight client.
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*
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* This function removes a client from the client list and frees the client struct.
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*/
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void kbase_debug_coresight_csf_unregister(void *client_data);
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/**
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* kbase_debug_coresight_csf_config_create - Creates a configuration containing
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* enable and disable sequence.
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*
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* @client_data: Pointer to a coresight client.
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* @enable_seq: Pointer to a struct containing the ops needed to enable coresight blocks.
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* It's optional so could be NULL.
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* @disable_seq: Pointer to a struct containing ops to run to disable coresight blocks.
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* It's optional so could be NULL.
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*
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* Return: Valid pointer on success. NULL on failure.
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*/
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void *
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kbase_debug_coresight_csf_config_create(void *client_data,
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struct kbase_debug_coresight_csf_sequence *enable_seq,
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struct kbase_debug_coresight_csf_sequence *disable_seq);
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/**
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* kbase_debug_coresight_csf_config_free - Frees a configuration containing
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* enable and disable sequence.
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*
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* @config_data: Pointer to a coresight configuration.
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*/
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void kbase_debug_coresight_csf_config_free(void *config_data);
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/**
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* kbase_debug_coresight_csf_config_enable - Enables a coresight configuration
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*
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* @config_data: Pointer to coresight configuration.
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*
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* If GPU is turned on, the configuration is immediately applied the CoreSight blocks.
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* If the GPU is turned off, the configuration is scheduled to be applied on the next
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* time the GPU is turned on.
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*
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* A configuration is enabled by executing read/write/poll ops defined in config->enable_seq.
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*
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* Return: 0 if success. Error code on failure.
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*/
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int kbase_debug_coresight_csf_config_enable(void *config_data);
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/**
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* kbase_debug_coresight_csf_config_disable - Disables a coresight configuration
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*
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* @config_data: Pointer to coresight configuration.
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*
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* If the GPU is turned off, this is effective a NOP as kbase should have disabled
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* the configuration when GPU is off.
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* If the GPU is on, the configuration will be disabled.
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*
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* A configuration is disabled by executing read/write/poll ops defined in config->disable_seq.
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*
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* Return: 0 if success. Error code on failure.
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*/
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int kbase_debug_coresight_csf_config_disable(void *config_data);
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#endif /* _KBASE_DEBUG_CORESIGHT_CSF_ */
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