// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Rockchip dmc common functions.
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*
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* Copyright (c) 2021 Rockchip Electronics Co. Ltd.
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* Author: Finley Xiao <finley.xiao@rock-chips.com>
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*/
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#include <linux/module.h>
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#include <soc/rockchip/rockchip_dmc.h>
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#define msch_rl_to_dmcfreq(work) container_of(to_delayed_work(work), \
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struct rockchip_dmcfreq, \
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msch_rl_work)
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#define MSCH_RL_DELAY_TIME 50 /* ms */
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static struct dmcfreq_common_info *common_info;
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static DECLARE_RWSEM(rockchip_dmcfreq_sem);
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void rockchip_dmcfreq_lock(void)
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{
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down_read(&rockchip_dmcfreq_sem);
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}
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EXPORT_SYMBOL(rockchip_dmcfreq_lock);
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void rockchip_dmcfreq_lock_nested(void)
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{
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down_read_nested(&rockchip_dmcfreq_sem, SINGLE_DEPTH_NESTING);
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}
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EXPORT_SYMBOL(rockchip_dmcfreq_lock_nested);
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void rockchip_dmcfreq_unlock(void)
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{
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up_read(&rockchip_dmcfreq_sem);
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}
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EXPORT_SYMBOL(rockchip_dmcfreq_unlock);
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int rockchip_dmcfreq_write_trylock(void)
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{
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return down_write_trylock(&rockchip_dmcfreq_sem);
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}
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EXPORT_SYMBOL(rockchip_dmcfreq_write_trylock);
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void rockchip_dmcfreq_write_unlock(void)
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{
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up_write(&rockchip_dmcfreq_sem);
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}
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EXPORT_SYMBOL(rockchip_dmcfreq_write_unlock);
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static void set_msch_rl(unsigned int readlatency)
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{
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rockchip_dmcfreq_lock();
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dev_dbg(common_info->dev, "rl 0x%x -> 0x%x\n",
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common_info->read_latency, readlatency);
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if (!common_info->set_msch_readlatency(readlatency))
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common_info->read_latency = readlatency;
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else
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dev_err(common_info->dev, "failed to set msch rl\n");
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rockchip_dmcfreq_unlock();
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}
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static void set_msch_rl_work(struct work_struct *work)
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{
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set_msch_rl(0);
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common_info->is_msch_rl_work_started = false;
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}
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int rockchip_dmcfreq_vop_bandwidth_init(struct dmcfreq_common_info *info)
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{
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if (info->set_msch_readlatency)
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INIT_DELAYED_WORK(&info->msch_rl_work, set_msch_rl_work);
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common_info = info;
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return 0;
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}
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EXPORT_SYMBOL(rockchip_dmcfreq_vop_bandwidth_init);
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void rockchip_dmcfreq_vop_bandwidth_update(struct dmcfreq_vop_info *vop_info)
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{
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unsigned long vop_last_rate, target = 0;
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unsigned int readlatency = 0;
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int i;
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if (!common_info)
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return;
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dev_dbg(common_info->dev, "line bw=%u, frame bw=%u, pn=%u, pn_4k=%u\n",
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vop_info->line_bw_mbyte, vop_info->frame_bw_mbyte,
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vop_info->plane_num, vop_info->plane_num_4k);
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if (!common_info->vop_pn_rl_tbl || !common_info->set_msch_readlatency)
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goto vop_bw_tbl;
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for (i = 0; common_info->vop_pn_rl_tbl[i].rl != DMCFREQ_TABLE_END; i++) {
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if (vop_info->plane_num >= common_info->vop_pn_rl_tbl[i].pn)
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readlatency = common_info->vop_pn_rl_tbl[i].rl;
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}
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dev_dbg(common_info->dev, "pn=%u\n", vop_info->plane_num);
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if (readlatency) {
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cancel_delayed_work_sync(&common_info->msch_rl_work);
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common_info->is_msch_rl_work_started = false;
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if (common_info->read_latency != readlatency)
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set_msch_rl(readlatency);
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} else if (common_info->read_latency &&
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!common_info->is_msch_rl_work_started) {
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common_info->is_msch_rl_work_started = true;
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schedule_delayed_work(&common_info->msch_rl_work,
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msecs_to_jiffies(MSCH_RL_DELAY_TIME));
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}
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vop_bw_tbl:
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if (!common_info->auto_freq_en || !common_info->vop_bw_tbl)
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goto vop_frame_bw_tbl;
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for (i = 0; common_info->vop_bw_tbl[i].freq != DMCFREQ_TABLE_END; i++) {
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if (vop_info->line_bw_mbyte >= common_info->vop_bw_tbl[i].min)
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target = common_info->vop_bw_tbl[i].freq;
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}
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vop_frame_bw_tbl:
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if (!common_info->auto_freq_en || !common_info->vop_frame_bw_tbl)
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goto next;
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for (i = 0; common_info->vop_frame_bw_tbl[i].freq != DMCFREQ_TABLE_END;
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i++) {
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if (vop_info->frame_bw_mbyte >= common_info->vop_frame_bw_tbl[i].min) {
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if (target < common_info->vop_frame_bw_tbl[i].freq)
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target = common_info->vop_frame_bw_tbl[i].freq;
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}
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}
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next:
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if (vop_info->plane_num_4k && target < common_info->vop_4k_rate)
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target = common_info->vop_4k_rate;
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vop_last_rate = common_info->vop_req_rate;
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common_info->vop_req_rate = target;
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if (target > vop_last_rate) {
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mutex_lock(&common_info->devfreq->lock);
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update_devfreq(common_info->devfreq);
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mutex_unlock(&common_info->devfreq->lock);
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}
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}
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EXPORT_SYMBOL(rockchip_dmcfreq_vop_bandwidth_update);
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int rockchip_dmcfreq_vop_bandwidth_request(struct dmcfreq_vop_info *vop_info)
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{
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unsigned long target = 0;
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int i;
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if (!common_info || !common_info->auto_freq_en ||
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!common_info->vop_bw_tbl)
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return 0;
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for (i = 0; common_info->vop_bw_tbl[i].freq != DMCFREQ_TABLE_END; i++) {
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if (vop_info->line_bw_mbyte <= common_info->vop_bw_tbl[i].max) {
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target = common_info->vop_bw_tbl[i].freq;
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break;
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}
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}
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if (!target)
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return -EINVAL;
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return 0;
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}
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EXPORT_SYMBOL(rockchip_dmcfreq_vop_bandwidth_request);
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MODULE_AUTHOR("Finley Xiao <finley.xiao@rock-chips.com>");
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MODULE_DESCRIPTION("rockchip dmcfreq driver with devfreq framework");
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MODULE_LICENSE("GPL v2");
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