// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
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*/
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#include <common.h>
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#include <asm/arch/cpu.h>
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#include <asm/io.h>
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#include <command.h>
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#include <dm.h>
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#include <linux/bitops.h>
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#include <linux/delay.h>
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#include <linux/iopoll.h>
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#include <misc.h>
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#include <rockchip-otp.h>
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struct otp_data {
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int (*init)(struct udevice *dev);
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int (*read)(struct udevice *dev, int offset, void *buf, int size);
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};
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static int rockchip_otp_wait_status(struct rockchip_otp_platdata *otp,
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u32 flag)
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{
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int delay = OTPC_TIMEOUT;
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while (!(readl(otp->base + OTPC_INT_STATUS) & flag)) {
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udelay(1);
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delay--;
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if (delay <= 0) {
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printf("%s: wait init status timeout\n", __func__);
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return -ETIMEDOUT;
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}
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}
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/* clean int status */
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writel(flag, otp->base + OTPC_INT_STATUS);
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return 0;
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}
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static int rockchip_otp_ecc_enable(struct rockchip_otp_platdata *otp,
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bool enable)
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{
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int ret = 0;
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writel(SBPI_DAP_ADDR_MASK | (SBPI_DAP_ADDR << SBPI_DAP_ADDR_SHIFT),
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otp->base + OTPC_SBPI_CTRL);
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writel(SBPI_CMD_VALID_MASK | 0x1, otp->base + OTPC_SBPI_CMD_VALID_PRE);
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writel(SBPI_DAP_CMD_WRF | SBPI_DAP_REG_ECC,
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otp->base + OTPC_SBPI_CMD0_OFFSET);
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if (enable)
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writel(SBPI_ECC_ENABLE, otp->base + OTPC_SBPI_CMD1_OFFSET);
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else
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writel(SBPI_ECC_DISABLE, otp->base + OTPC_SBPI_CMD1_OFFSET);
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writel(SBPI_ENABLE_MASK | SBPI_ENABLE, otp->base + OTPC_SBPI_CTRL);
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ret = rockchip_otp_wait_status(otp, OTPC_SBPI_DONE);
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if (ret < 0)
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printf("%s timeout during ecc_enable\n", __func__);
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return ret;
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}
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static int rockchip_px30_otp_read(struct udevice *dev, int offset,
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void *buf, int size)
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{
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struct rockchip_otp_platdata *otp = dev_get_platdata(dev);
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u8 *buffer = buf;
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int ret = 0;
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ret = rockchip_otp_ecc_enable(otp, false);
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if (ret < 0) {
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printf("%s rockchip_otp_ecc_enable err\n", __func__);
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return ret;
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}
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writel(OTPC_USE_USER | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL);
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udelay(5);
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while (size--) {
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writel(offset++ | OTPC_USER_ADDR_MASK,
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otp->base + OTPC_USER_ADDR);
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writel(OTPC_USER_FSM_ENABLE | OTPC_USER_FSM_ENABLE_MASK,
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otp->base + OTPC_USER_ENABLE);
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ret = rockchip_otp_wait_status(otp, OTPC_USER_DONE);
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if (ret < 0) {
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printf("%s timeout during read setup\n", __func__);
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goto read_end;
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}
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*buffer++ = readb(otp->base + OTPC_USER_Q);
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}
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read_end:
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writel(0x0 | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL);
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return ret;
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}
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static int rk3308bs_otp_wait_status(struct rockchip_otp_platdata *otp, u32 flag)
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{
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int delay = OTPC_TIMEOUT;
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while (!(readl(otp->base + OTPC_IRQ_ST) & flag)) {
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udelay(1);
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delay--;
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if (delay <= 0) {
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printf("%s: wait init status timeout\n", __func__);
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return -ETIMEDOUT;
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}
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}
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/* clean int status */
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writel(flag, otp->base + OTPC_IRQ_ST);
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return 0;
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}
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static int rk3308bs_otp_active(struct rockchip_otp_platdata *otp)
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{
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int ret = 0;
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u32 mode;
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mode = readl(otp->base + OTPC_MODE_CTRL);
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switch (mode) {
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case OTPC_DEEP_STANDBY:
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writel(OTPC_STANDBY, otp->base + OTPC_MODE_CTRL);
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ret = rk3308bs_otp_wait_status(otp, OTPC_DP2STB_IRQ_ST);
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if (ret < 0) {
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dev_err(otp->dev, "timeout during wait dp2stb\n");
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return ret;
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}
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case OTPC_STANDBY:
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writel(OTPC_ACTIVE, otp->base + OTPC_MODE_CTRL);
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ret = rk3308bs_otp_wait_status(otp, OTPC_STB2ACT_IRQ_ST);
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if (ret < 0) {
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dev_err(otp->dev, "timeout during wait stb2act\n");
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return ret;
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}
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break;
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default:
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break;
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}
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return ret;
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}
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static int rk3308bs_otp_standby(struct rockchip_otp_platdata *otp)
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{
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int ret = 0;
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u32 mode;
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mode = readl(otp->base + OTPC_MODE_CTRL);
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switch (mode) {
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case OTPC_ACTIVE:
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writel(OTPC_STANDBY, otp->base + OTPC_MODE_CTRL);
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ret = rk3308bs_otp_wait_status(otp, OTPC_ACT2STB_IRQ_ST);
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if (ret < 0) {
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dev_err(otp->dev, "timeout during wait act2stb\n");
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return ret;
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}
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case OTPC_STANDBY:
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writel(OTPC_DEEP_STANDBY, otp->base + OTPC_MODE_CTRL);
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ret = rk3308bs_otp_wait_status(otp, OTPC_STB2DP_IRQ_ST);
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if (ret < 0) {
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dev_err(otp->dev, "timeout during wait stb2dp\n");
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return ret;
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}
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break;
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default:
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break;
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}
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return ret;
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}
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static int rockchip_rk3308bs_otp_read(struct udevice *dev, int offset,
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void *buf, int size)
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{
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struct rockchip_otp_platdata *otp = dev_get_platdata(dev);
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unsigned int addr_start, addr_end, addr_offset, addr_len;
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u32 out_value;
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u8 *buffer;
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int ret = 0, i = 0;
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if (offset > RK3308BS_MAX_BYTES - 1)
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return -ENOMEM;
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if (offset + size > RK3308BS_MAX_BYTES)
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size = RK3308BS_MAX_BYTES - offset;
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ret = rk3308bs_otp_active(otp);
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if (ret)
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goto out;
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addr_start = rounddown(offset, RK3308BS_NBYTES) / RK3308BS_NBYTES;
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addr_end = roundup(offset + size, RK3308BS_NBYTES) / RK3308BS_NBYTES;
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addr_offset = offset % RK3308BS_NBYTES;
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addr_len = addr_end - addr_start;
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buffer = calloc(1, sizeof(*buffer) * addr_len * RK3308BS_NBYTES);
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if (!buffer) {
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ret = -ENOMEM;
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goto read_end;
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}
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while (addr_len--) {
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writel(OTPC_TRANS_NUM, otp->base + OTPC_REPR_RD_TRANS_NUM);
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writel(addr_start++, otp->base + OTPC_ACCESS_ADDR);
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writel(OTPC_READ_ACCESS, otp->base + OTPC_MODE_CTRL);
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ret = rk3308bs_otp_wait_status(otp, OTPC_RDM_IRQ_ST);
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if (ret < 0) {
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printf("timeout during wait rd\n");
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goto read_end;
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}
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out_value = readl(otp->base + OTPC_RD_DATA);
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memcpy(&buffer[i], &out_value, RK3308BS_NBYTES);
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i += RK3308BS_NBYTES;
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}
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memcpy(buf, buffer + addr_offset, size);
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read_end:
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kfree(buffer);
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rk3308bs_otp_standby(otp);
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out:
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return ret;
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}
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static int rockchip_rk3568_otp_read(struct udevice *dev, int offset, void *buf,
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int size)
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{
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struct rockchip_otp_platdata *otp = dev_get_platdata(dev);
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unsigned int addr_start, addr_end, addr_offset, addr_len;
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u32 out_value;
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u8 *buffer;
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int ret = 0, i = 0;
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addr_start = rounddown(offset, RK3568_NBYTES) / RK3568_NBYTES;
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addr_end = roundup(offset + size, RK3568_NBYTES) / RK3568_NBYTES;
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addr_offset = offset % RK3568_NBYTES;
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addr_len = addr_end - addr_start;
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buffer = calloc(1, sizeof(*buffer) * addr_len * RK3568_NBYTES);
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if (!buffer)
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return -ENOMEM;
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ret = rockchip_otp_ecc_enable(otp, false);
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if (ret < 0) {
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printf("%s rockchip_otp_ecc_enable err\n", __func__);
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return ret;
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}
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writel(OTPC_USE_USER | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL);
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udelay(5);
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while (addr_len--) {
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writel(addr_start++ | OTPC_USER_ADDR_MASK,
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otp->base + OTPC_USER_ADDR);
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writel(OTPC_USER_FSM_ENABLE | OTPC_USER_FSM_ENABLE_MASK,
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otp->base + OTPC_USER_ENABLE);
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ret = rockchip_otp_wait_status(otp, OTPC_USER_DONE);
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if (ret < 0) {
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printf("%s timeout during read setup\n", __func__);
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goto read_end;
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}
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out_value = readl(otp->base + OTPC_USER_Q);
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memcpy(&buffer[i], &out_value, RK3568_NBYTES);
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i += RK3568_NBYTES;
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}
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memcpy(buf, buffer + addr_offset, size);
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read_end:
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writel(0x0 | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL);
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kfree(buffer);
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return ret;
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}
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static int rockchip_rk3588_otp_read(struct udevice *dev, int offset, void *buf,
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int size)
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{
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struct rockchip_otp_platdata *otp = dev_get_platdata(dev);
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unsigned int addr_start, addr_end, addr_offset, addr_len;
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int ret = 0, i = 0;
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u32 out_value, st = 0;
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u8 *buffer;
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if (offset > RK3588_MAX_BYTES - 1)
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return -ENOMEM;
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if (offset + size > RK3588_MAX_BYTES)
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size = RK3588_MAX_BYTES - offset;
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addr_start = rounddown(offset, RK3588_NBYTES) / RK3588_NBYTES;
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addr_end = roundup(offset + size, RK3588_NBYTES) / RK3588_NBYTES;
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addr_offset = offset % RK3588_NBYTES;
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addr_len = addr_end - addr_start;
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addr_start += RK3588_NO_SECURE_OFFSET;
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buffer = calloc(1, sizeof(*buffer) * addr_len * RK3588_NBYTES);
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if (!buffer)
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return -ENOMEM;
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while (addr_len--) {
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writel((addr_start << RK3588_ADDR_SHIFT) |
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(RK3588_BURST_NUM << RK3588_BURST_SHIFT),
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otp->base + RK3588_OTPC_AUTO_CTRL);
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writel(RK3588_AUTO_EN, otp->base + RK3588_OTPC_AUTO_EN);
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ret = readl_poll_timeout(otp->base + RK3588_OTPC_INT_ST, st,
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st & RK3588_RD_DONE, OTPC_TIMEOUT);
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if (ret < 0) {
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printf("%s timeout during read setup\n", __func__);
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goto read_end;
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}
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writel(RK3588_RD_DONE, otp->base + RK3588_OTPC_INT_ST);
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out_value = readl(otp->base + RK3588_OTPC_DOUT0);
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memcpy(&buffer[i], &out_value, RK3588_NBYTES);
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i += RK3588_NBYTES;
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addr_start++;
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}
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memcpy(buf, buffer + addr_offset, size);
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read_end:
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kfree(buffer);
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return ret;
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}
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static int rockchip_rv1126_otp_init(struct udevice *dev)
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{
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struct rockchip_otp_platdata *otp = dev_get_platdata(dev);
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u32 status = 0;
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int ret;
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writel(0x0, otp->base + RV1126_OTP_NVM_CEB);
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ret = readl_poll_timeout(otp->base + RV1126_OTP_NVM_ST, status,
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status & 0x1, OTPC_TIMEOUT);
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if (ret < 0) {
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printf("%s timeout during set ceb\n", __func__);
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return ret;
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}
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writel(0x1, otp->base + RV1126_OTP_NVM_RSTB);
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ret = readl_poll_timeout(otp->base + RV1126_OTP_NVM_ST, status,
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status & 0x4, OTPC_TIMEOUT);
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if (ret < 0) {
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printf("%s timeout during set rstb\n", __func__);
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return ret;
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}
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return 0;
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}
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static int rockchip_rv1126_otp_read(struct udevice *dev, int offset, void *buf,
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int size)
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{
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struct rockchip_otp_platdata *otp = dev_get_platdata(dev);
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u32 status = 0;
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u8 *buffer = buf;
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int ret = 0;
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while (size--) {
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writel(offset++, otp->base + RV1126_OTP_NVM_RADDR);
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writel(0x1, otp->base + RV1126_OTP_NVM_RSTART);
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ret = readl_poll_timeout(otp->base + RV1126_OTP_READ_ST,
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status, status == 0, OTPC_TIMEOUT);
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if (ret < 0) {
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printf("%s timeout during read setup\n", __func__);
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return ret;
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}
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*buffer++ = readb(otp->base + RV1126_OTP_NVM_RDATA);
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}
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return 0;
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}
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static int rockchip_otp_read(struct udevice *dev, int offset,
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void *buf, int size)
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{
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struct otp_data *data;
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data = (struct otp_data *)dev_get_driver_data(dev);
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if (!data)
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return -ENOSYS;
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if (soc_is_rk3308bs() || soc_is_px30s())
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return rockchip_rk3308bs_otp_read(dev, offset, buf, size);
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return data->read(dev, offset, buf, size);
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}
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static const struct misc_ops rockchip_otp_ops = {
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.read = rockchip_otp_read,
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};
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static int rockchip_otp_ofdata_to_platdata(struct udevice *dev)
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{
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struct rockchip_otp_platdata *otp = dev_get_platdata(dev);
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otp->base = dev_read_addr_ptr(dev);
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return 0;
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}
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static int rockchip_otp_probe(struct udevice *dev)
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{
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struct otp_data *data;
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data = (struct otp_data *)dev_get_driver_data(dev);
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if (!data)
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return -EINVAL;
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if (data->init)
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return data->init(dev);
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return 0;
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}
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static const struct otp_data px30_data = {
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.read = rockchip_px30_otp_read,
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};
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static const struct otp_data rk3308bs_data = {
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.read = rockchip_rk3308bs_otp_read,
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};
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static const struct otp_data rk3568_data = {
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.read = rockchip_rk3568_otp_read,
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};
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static const struct otp_data rk3588_data = {
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.read = rockchip_rk3588_otp_read,
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};
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static const struct otp_data rv1126_data = {
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.init = rockchip_rv1126_otp_init,
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.read = rockchip_rv1126_otp_read,
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};
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static const struct udevice_id rockchip_otp_ids[] = {
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{
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.compatible = "rockchip,px30-otp",
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.data = (ulong)&px30_data,
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},
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{
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.compatible = "rockchip,px30s-otp",
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.data = (ulong)&rk3308bs_data,
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},
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{
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.compatible = "rockchip,rk3308-otp",
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.data = (ulong)&px30_data,
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},
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{
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.compatible = "rockchip,rk3308bs-otp",
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.data = (ulong)&rk3308bs_data,
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},
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{
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.compatible = "rockchip,rk3568-otp",
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.data = (ulong)&rk3568_data,
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},
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{
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.compatible = "rockchip,rk3588-otp",
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.data = (ulong)&rk3588_data,
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},
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{
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.compatible = "rockchip,rv1106-otp",
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.data = (ulong)&rk3568_data,
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},
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{
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.compatible = "rockchip,rv1126-otp",
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.data = (ulong)&rv1126_data,
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},
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{}
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};
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U_BOOT_DRIVER(rockchip_otp) = {
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.name = "rockchip_otp",
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.id = UCLASS_MISC,
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.of_match = rockchip_otp_ids,
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.ops = &rockchip_otp_ops,
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.ofdata_to_platdata = rockchip_otp_ofdata_to_platdata,
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.platdata_auto_alloc_size = sizeof(struct rockchip_otp_platdata),
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.probe = rockchip_otp_probe,
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};
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