/*
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* Copyright (C) 2013 Freescale Semiconductor, Inc.
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* Copyright (C) 2015 ECA Sinters
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*
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* Author: Fabio Estevam <fabio.estevam@freescale.com>
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* Modified by: Boris Brezillon <boris.brezillon@free-electrons.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <asm/arch/clock.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/iomux.h>
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#include <asm/arch/mx6-pins.h>
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#include <linux/errno.h>
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#include <asm/gpio.h>
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#include <asm/mach-imx/iomux-v3.h>
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#include <asm/mach-imx/boot_mode.h>
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#include <malloc.h>
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#include <mmc.h>
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#include <fsl_esdhc.h>
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#include <miiphy.h>
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#include <netdev.h>
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#include <asm/arch/mxc_hdmi.h>
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#include <asm/arch/crm_regs.h>
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#include <linux/fb.h>
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#include <ipu_pixfmt.h>
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#include <asm/io.h>
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#include <asm/arch/sys_proto.h>
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#include <micrel.h>
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#include <asm/mach-imx/mxc_i2c.h>
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#include <i2c.h>
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#include "../common/mx6.h"
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DECLARE_GLOBAL_DATA_PTR;
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int dram_init(void)
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{
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gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
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return 0;
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}
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int board_early_init_f(void)
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{
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seco_mx6_setup_uart_iomux();
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return 0;
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}
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int board_phy_config(struct phy_device *phydev)
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{
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seco_mx6_rgmii_rework(phydev);
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if (phydev->drv->config)
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phydev->drv->config(phydev);
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return 0;
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}
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int board_eth_init(bd_t *bis)
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{
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uint32_t base = IMX_FEC_BASE;
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struct mii_dev *bus = NULL;
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struct phy_device *phydev = NULL;
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int ret = 0;
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seco_mx6_setup_enet_iomux();
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#ifdef CONFIG_FEC_MXC
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bus = fec_get_miibus(base, -1);
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if (!bus)
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return -ENOMEM;
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/* scan phy 4,5,6,7 */
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phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII);
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if (!phydev) {
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free(bus);
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return -ENOMEM;
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}
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printf("using phy at %d\n", phydev->addr);
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ret = fec_probe(bis, -1, base, bus, phydev);
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if (ret) {
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free(phydev);
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free(bus);
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printf("FEC MXC: %s:failed\n", __func__);
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}
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#endif
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return ret;
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}
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#define USDHC4_CD_GPIO IMX_GPIO_NR(2, 6)
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static struct fsl_esdhc_cfg usdhc_cfg[2] = {
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{USDHC3_BASE_ADDR, 0, 4},
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{USDHC4_BASE_ADDR, 0, 4},
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};
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int board_mmc_getcd(struct mmc *mmc)
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{
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struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
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int ret = 0;
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switch (cfg->esdhc_base) {
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case USDHC3_BASE_ADDR:
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ret = 1; /* Assume eMMC is always present */
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break;
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case USDHC4_BASE_ADDR:
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ret = !gpio_get_value(USDHC4_CD_GPIO);
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break;
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}
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return ret;
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}
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int board_mmc_init(bd_t *bis)
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{
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u32 index = 0;
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int ret;
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/*
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* Following map is done:
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* (U-Boot device node) (Physical Port)
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* mmc0 eMMC on Board
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* mmc1 Ext SD
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*/
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for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) {
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switch (index) {
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case 0:
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seco_mx6_setup_usdhc_iomux(3);
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usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
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break;
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case 1:
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seco_mx6_setup_usdhc_iomux(4);
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usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
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break;
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default:
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printf("Warning: %d exceed maximum number of SD ports %d\n",
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index + 1, CONFIG_SYS_FSL_USDHC_NUM);
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return -EINVAL;
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}
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ret = fsl_esdhc_initialize(bis, &usdhc_cfg[index]);
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if (ret)
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return ret;
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}
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return 0;
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}
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int board_init(void)
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{
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/* address of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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imx_iomux_v3_setup_pad(MX6_PAD_NANDF_D4__GPIO2_IO04 |
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MUX_PAD_CTRL(NO_PAD_CTRL));
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gpio_direction_output(IMX_GPIO_NR(2, 4), 0);
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/* Set Low */
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gpio_set_value(IMX_GPIO_NR(2, 4), 0);
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udelay(1000);
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/* Set High */
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gpio_set_value(IMX_GPIO_NR(2, 4), 1);
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return 0;
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}
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int checkboard(void)
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{
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puts("Board: SECO uQ7\n");
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return 0;
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}
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