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| /*
| * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
| *
| * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
| */
|
| #ifndef __DT_BINDINGS_POWER_PX30_POWER_H__
| #define __DT_BINDINGS_POWER_PX30_POWER_H__
|
| /* VD_CORE */
| #define PX30_PD_A35_0 0
| #define PX30_PD_A35_1 1
| #define PX30_PD_A35_2 2
| #define PX30_PD_A35_3 3
| #define PX30_PD_SCU 4
|
| /* VD_LOGIC */
| #define PX30_PD_USB 5
| #define PX30_PD_DDR 6
| #define PX30_PD_SDCARD 7
| #define PX30_PD_CRYPTO 8
| #define PX30_PD_GMAC 9
| #define PX30_PD_MMC_NAND 10
| #define PX30_PD_VPU 11
| #define PX30_PD_VO 12
| #define PX30_PD_VI 13
| #define PX30_PD_GPU 14
|
| /* VD_PMU */
| #define PX30_PD_PMU 15
|
| #endif
|
|
