/*
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* Copyright (c) 2012 The Chromium OS Authors.
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* (C) Copyright 2002-2010
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_GENERIC_GBL_DATA_H
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#define __ASM_GENERIC_GBL_DATA_H
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/*
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* The following data structure is placed in some memory which is
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* available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
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* some locked parts of the data cache) to allow for a minimum set of
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* global variables during system initialization (until we have set
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* up the memory controller so that we can use RAM).
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*
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* Keep it *SMALL* and remember to set GENERATED_GBL_DATA_SIZE > sizeof(gd_t)
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*
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* Each architecture has its own private fields. For now all are private
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*/
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#ifndef __ASSEMBLY__
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#include <membuff.h>
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#include <linux/list.h>
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/* Never change the sequence of members !!! */
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struct pm_ctx {
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unsigned long sp;
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phys_addr_t cpu_resume_addr;
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unsigned long suspend_regs[15];
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};
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struct pre_serial {
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u32 using_pre_serial;
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u32 enable;
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u32 id;
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u32 baudrate;
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ulong addr;
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};
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typedef struct global_data {
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bd_t *bd;
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unsigned long flags;
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unsigned int baudrate;
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unsigned long cpu_clk; /* CPU clock in Hz! */
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unsigned long bus_clk;
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/* We cannot bracket this with CONFIG_PCI due to mpc5xxx */
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unsigned long pci_clk;
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unsigned long mem_clk;
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#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
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unsigned long fb_base; /* Base address of framebuffer mem */
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#endif
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#if defined(CONFIG_POST)
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unsigned long post_log_word; /* Record POST activities */
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unsigned long post_log_res; /* success of POST test */
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unsigned long post_init_f_time; /* When post_init_f started */
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#endif
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#ifdef CONFIG_BOARD_TYPES
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unsigned long board_type;
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#endif
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unsigned long have_console; /* serial_init() was called */
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#if CONFIG_IS_ENABLED(PRE_CONSOLE_BUFFER)
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unsigned long precon_buf_idx; /* Pre-Console buffer index */
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#endif
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unsigned long env_addr; /* Address of Environment struct */
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unsigned long env_valid; /* Environment valid? enum env_valid */
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unsigned long ram_top; /* Top address of RAM used by U-Boot */
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unsigned long ram_top_ext_size; /* Extend size of RAM top */
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unsigned long relocaddr; /* Start address of U-Boot in RAM */
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phys_size_t ram_size; /* RAM size */
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unsigned long mon_len; /* monitor len */
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unsigned long irq_sp; /* irq stack pointer */
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unsigned long start_addr_sp; /* start_addr_stackpointer */
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unsigned long reloc_off;
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struct global_data *new_gd; /* relocated global data */
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#ifdef CONFIG_DM
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struct udevice *dm_root; /* Root instance for Driver Model */
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struct udevice *dm_root_f; /* Pre-relocation root instance */
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struct list_head uclass_root; /* Head of core tree */
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#endif
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#ifdef CONFIG_TIMER
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struct udevice *timer; /* Timer instance for Driver Model */
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#endif
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const void *fdt_blob; /* Our device tree, NULL if none */
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void *new_fdt; /* Relocated FDT */
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unsigned long fdt_size; /* Space reserved for relocated FDT */
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#ifdef CONFIG_OF_LIVE
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struct device_node *of_root;
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struct device_node *of_root_f; /* U-Boot of-root instance */
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#endif
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const void *ufdt_blob; /* Our U-Boot device tree, NULL if none */
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const void *fdt_blob_kern; /* Kernel dtb at the tail of u-boot.bin */
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struct jt_funcs *jt; /* jump table */
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char env_buf[32]; /* buffer for env_get() before reloc. */
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#ifdef CONFIG_TRACE
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void *trace_buff; /* The trace buffer */
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#endif
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#if defined(CONFIG_SYS_I2C)
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int cur_i2c_bus; /* current used i2c bus */
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#endif
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#ifdef CONFIG_SYS_I2C_MXC
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void *srdata[10];
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#endif
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unsigned int timebase_h;
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unsigned int timebase_l;
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#if CONFIG_VAL(SYS_MALLOC_F_LEN)
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unsigned long malloc_base; /* base address of early malloc() */
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unsigned long malloc_limit; /* limit address */
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unsigned long malloc_ptr; /* current address */
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#endif
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#ifdef CONFIG_PCI
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struct pci_controller *hose; /* PCI hose for early use */
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phys_addr_t pci_ram_top; /* top of region accessible to PCI */
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#endif
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#ifdef CONFIG_PCI_BOOTDELAY
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int pcidelay_done;
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#endif
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struct udevice *cur_serial_dev; /* current serial device */
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struct arch_global_data arch; /* architecture-specific data */
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#ifdef CONFIG_CONSOLE_RECORD
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struct membuff console_out; /* console output */
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struct membuff console_in; /* console input */
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#endif
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#ifdef CONFIG_DM_VIDEO
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ulong video_top; /* Top of video frame buffer area */
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ulong video_bottom; /* Bottom of video frame buffer area */
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#endif
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#ifdef CONFIG_BOOTSTAGE
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struct bootstage_data *bootstage; /* Bootstage information */
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struct bootstage_data *new_bootstage; /* Relocated bootstage info */
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#endif
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phys_addr_t pm_ctx_phys;
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#ifdef CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP
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int new_line;
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#endif
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struct pre_serial serial;
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ulong sys_start_tick; /* For report system start-up time */
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int console_evt; /* Console event, maybe some hotkey */
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#ifdef CONFIG_LOG
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int log_drop_count; /* Number of dropped log messages */
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int default_log_level; /* For devices with no filters */
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struct list_head log_head; /* List of struct log_device */
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#endif
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#if CONFIG_IS_ENABLED(FIT_ROLLBACK_PROTECT)
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u32 rollback_index;
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#endif
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#ifdef CONFIG_PSTORE
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u64 pstore_addr;
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u32 pstore_size;
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#endif
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} gd_t;
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#endif
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#ifdef CONFIG_BOARD_TYPES
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#define gd_board_type() gd->board_type
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#else
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#define gd_board_type() 0
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#endif
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/*
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* Global Data Flags - the top 16 bits are reserved for arch-specific flags
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*/
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#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
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#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
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#define GD_FLG_SILENT 0x00004 /* Silent mode */
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#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
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#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
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#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
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#define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */
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#define GD_FLG_ENV_READY 0x00080 /* Env. imported into hash table */
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#define GD_FLG_SERIAL_READY 0x00100 /* Pre-reloc serial console ready */
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#define GD_FLG_FULL_MALLOC_INIT 0x00200 /* Full malloc() is ready */
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#define GD_FLG_SPL_INIT 0x00400 /* spl_init() has been called */
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#define GD_FLG_SKIP_RELOC 0x00800 /* Don't relocate */
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#define GD_FLG_RECORD 0x01000 /* Record console */
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#define GD_FLG_ENV_DEFAULT 0x02000 /* Default variable flag */
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#define GD_FLG_SPL_EARLY_INIT 0x04000 /* Early SPL init is done */
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#define GD_FLG_LOG_READY 0x08000 /* Log system is ready for use */
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#define GD_FLG_KDTB_READY 0x10000 /* Kernel dtb is ready for use */
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#ifdef CONFIG_ARCH_ROCKCHIP
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/* BL32 is enabled */
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#define GD_FLG_BL32_ENABLED 0x20000
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#endif
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#endif /* __ASM_GENERIC_GBL_DATA_H */
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