/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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#ifndef __DT_BINDINGS_POWER_RK3368_POWER_H__
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#define __DT_BINDINGS_POWER_RK3368_POWER_H__
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/* VD_CORE */
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#define RK3368_PD_A53_L0 0
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#define RK3368_PD_A53_L1 1
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#define RK3368_PD_A53_L2 2
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#define RK3368_PD_A53_L3 3
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#define RK3368_PD_SCU_L 4
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#define RK3368_PD_A53_B0 5
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#define RK3368_PD_A53_B1 6
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#define RK3368_PD_A53_B2 7
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#define RK3368_PD_A53_B3 8
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#define RK3368_PD_SCU_B 9
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/* VD_LOGIC */
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#define RK3368_PD_BUS 10
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#define RK3368_PD_PERI 11
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#define RK3368_PD_VIO 12
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#define RK3368_PD_ALIVE 13
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#define RK3368_PD_VIDEO 14
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#define RK3368_PD_GPU_0 15
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#define RK3368_PD_GPU_1 16
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/* VD_PMU */
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#define RK3368_PD_PMU 17
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#endif
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