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| /* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
| /*
| * Copyright (c) 2019 Amlogic, Inc.
| * Author: Jianxin Pan <jianxin.pan@amlogic.com>
| */
|
| #ifndef _DT_BINDINGS_MESON_A1_POWER_H
| #define _DT_BINDINGS_MESON_A1_POWER_H
|
| #define PWRC_DSPA_ID 8
| #define PWRC_DSPB_ID 9
| #define PWRC_UART_ID 10
| #define PWRC_DMC_ID 11
| #define PWRC_I2C_ID 12
| #define PWRC_PSRAM_ID 13
| #define PWRC_ACODEC_ID 14
| #define PWRC_AUDIO_ID 15
| #define PWRC_OTP_ID 16
| #define PWRC_DMA_ID 17
| #define PWRC_SD_EMMC_ID 18
| #define PWRC_RAMA_ID 19
| #define PWRC_RAMB_ID 20
| #define PWRC_IR_ID 21
| #define PWRC_SPICC_ID 22
| #define PWRC_SPIFC_ID 23
| #define PWRC_USB_ID 24
| #define PWRC_NIC_ID 25
| #define PWRC_PDMIN_ID 26
| #define PWRC_RSA_ID 27
| #define PWRC_MAX_ID 28
|
| #endif
|
|
