/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Device Tree defines for Lochnagar pinctrl
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*
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* Copyright (c) 2018 Cirrus Logic, Inc. and
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* Cirrus Logic International Semiconductor Ltd.
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*
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* Author: Charles Keepax <ckeepax@opensource.cirrus.com>
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*/
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#ifndef DT_BINDINGS_PINCTRL_LOCHNAGAR_H
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#define DT_BINDINGS_PINCTRL_LOCHNAGAR_H
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#define LOCHNAGAR1_PIN_CDC_RESET 0
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#define LOCHNAGAR1_PIN_DSP_RESET 1
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#define LOCHNAGAR1_PIN_CDC_CIF1MODE 2
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#define LOCHNAGAR1_PIN_NUM_GPIOS 3
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#define LOCHNAGAR2_PIN_CDC_RESET 0
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#define LOCHNAGAR2_PIN_DSP_RESET 1
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#define LOCHNAGAR2_PIN_CDC_CIF1MODE 2
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#define LOCHNAGAR2_PIN_CDC_LDOENA 3
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#define LOCHNAGAR2_PIN_SPDIF_HWMODE 4
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#define LOCHNAGAR2_PIN_SPDIF_RESET 5
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#define LOCHNAGAR2_PIN_FPGA_GPIO1 6
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#define LOCHNAGAR2_PIN_FPGA_GPIO2 7
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#define LOCHNAGAR2_PIN_FPGA_GPIO3 8
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#define LOCHNAGAR2_PIN_FPGA_GPIO4 9
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#define LOCHNAGAR2_PIN_FPGA_GPIO5 10
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#define LOCHNAGAR2_PIN_FPGA_GPIO6 11
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#define LOCHNAGAR2_PIN_CDC_GPIO1 12
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#define LOCHNAGAR2_PIN_CDC_GPIO2 13
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#define LOCHNAGAR2_PIN_CDC_GPIO3 14
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#define LOCHNAGAR2_PIN_CDC_GPIO4 15
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#define LOCHNAGAR2_PIN_CDC_GPIO5 16
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#define LOCHNAGAR2_PIN_CDC_GPIO6 17
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#define LOCHNAGAR2_PIN_CDC_GPIO7 18
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#define LOCHNAGAR2_PIN_CDC_GPIO8 19
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#define LOCHNAGAR2_PIN_DSP_GPIO1 20
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#define LOCHNAGAR2_PIN_DSP_GPIO2 21
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#define LOCHNAGAR2_PIN_DSP_GPIO3 22
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#define LOCHNAGAR2_PIN_DSP_GPIO4 23
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#define LOCHNAGAR2_PIN_DSP_GPIO5 24
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#define LOCHNAGAR2_PIN_DSP_GPIO6 25
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#define LOCHNAGAR2_PIN_GF_GPIO2 26
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#define LOCHNAGAR2_PIN_GF_GPIO3 27
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#define LOCHNAGAR2_PIN_GF_GPIO7 28
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#define LOCHNAGAR2_PIN_CDC_AIF1_BCLK 29
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#define LOCHNAGAR2_PIN_CDC_AIF1_RXDAT 30
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#define LOCHNAGAR2_PIN_CDC_AIF1_LRCLK 31
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#define LOCHNAGAR2_PIN_CDC_AIF1_TXDAT 32
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#define LOCHNAGAR2_PIN_CDC_AIF2_BCLK 33
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#define LOCHNAGAR2_PIN_CDC_AIF2_RXDAT 34
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#define LOCHNAGAR2_PIN_CDC_AIF2_LRCLK 35
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#define LOCHNAGAR2_PIN_CDC_AIF2_TXDAT 36
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#define LOCHNAGAR2_PIN_CDC_AIF3_BCLK 37
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#define LOCHNAGAR2_PIN_CDC_AIF3_RXDAT 38
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#define LOCHNAGAR2_PIN_CDC_AIF3_LRCLK 39
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#define LOCHNAGAR2_PIN_CDC_AIF3_TXDAT 40
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#define LOCHNAGAR2_PIN_DSP_AIF1_BCLK 41
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#define LOCHNAGAR2_PIN_DSP_AIF1_RXDAT 42
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#define LOCHNAGAR2_PIN_DSP_AIF1_LRCLK 43
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#define LOCHNAGAR2_PIN_DSP_AIF1_TXDAT 44
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#define LOCHNAGAR2_PIN_DSP_AIF2_BCLK 45
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#define LOCHNAGAR2_PIN_DSP_AIF2_RXDAT 46
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#define LOCHNAGAR2_PIN_DSP_AIF2_LRCLK 47
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#define LOCHNAGAR2_PIN_DSP_AIF2_TXDAT 48
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#define LOCHNAGAR2_PIN_PSIA1_BCLK 49
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#define LOCHNAGAR2_PIN_PSIA1_RXDAT 50
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#define LOCHNAGAR2_PIN_PSIA1_LRCLK 51
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#define LOCHNAGAR2_PIN_PSIA1_TXDAT 52
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#define LOCHNAGAR2_PIN_PSIA2_BCLK 53
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#define LOCHNAGAR2_PIN_PSIA2_RXDAT 54
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#define LOCHNAGAR2_PIN_PSIA2_LRCLK 55
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#define LOCHNAGAR2_PIN_PSIA2_TXDAT 56
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#define LOCHNAGAR2_PIN_GF_AIF3_BCLK 57
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#define LOCHNAGAR2_PIN_GF_AIF3_RXDAT 58
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#define LOCHNAGAR2_PIN_GF_AIF3_LRCLK 59
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#define LOCHNAGAR2_PIN_GF_AIF3_TXDAT 60
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#define LOCHNAGAR2_PIN_GF_AIF4_BCLK 61
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#define LOCHNAGAR2_PIN_GF_AIF4_RXDAT 62
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#define LOCHNAGAR2_PIN_GF_AIF4_LRCLK 63
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#define LOCHNAGAR2_PIN_GF_AIF4_TXDAT 64
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#define LOCHNAGAR2_PIN_GF_AIF1_BCLK 65
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#define LOCHNAGAR2_PIN_GF_AIF1_RXDAT 66
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#define LOCHNAGAR2_PIN_GF_AIF1_LRCLK 67
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#define LOCHNAGAR2_PIN_GF_AIF1_TXDAT 68
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#define LOCHNAGAR2_PIN_GF_AIF2_BCLK 69
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#define LOCHNAGAR2_PIN_GF_AIF2_RXDAT 70
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#define LOCHNAGAR2_PIN_GF_AIF2_LRCLK 71
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#define LOCHNAGAR2_PIN_GF_AIF2_TXDAT 72
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#define LOCHNAGAR2_PIN_DSP_UART1_RX 73
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#define LOCHNAGAR2_PIN_DSP_UART1_TX 74
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#define LOCHNAGAR2_PIN_DSP_UART2_RX 75
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#define LOCHNAGAR2_PIN_DSP_UART2_TX 76
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#define LOCHNAGAR2_PIN_GF_UART2_RX 77
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#define LOCHNAGAR2_PIN_GF_UART2_TX 78
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#define LOCHNAGAR2_PIN_USB_UART_RX 79
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#define LOCHNAGAR2_PIN_CDC_PDMCLK1 80
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#define LOCHNAGAR2_PIN_CDC_PDMDAT1 81
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#define LOCHNAGAR2_PIN_CDC_PDMCLK2 82
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#define LOCHNAGAR2_PIN_CDC_PDMDAT2 83
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#define LOCHNAGAR2_PIN_CDC_DMICCLK1 84
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#define LOCHNAGAR2_PIN_CDC_DMICDAT1 85
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#define LOCHNAGAR2_PIN_CDC_DMICCLK2 86
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#define LOCHNAGAR2_PIN_CDC_DMICDAT2 87
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#define LOCHNAGAR2_PIN_CDC_DMICCLK3 88
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#define LOCHNAGAR2_PIN_CDC_DMICDAT3 89
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#define LOCHNAGAR2_PIN_CDC_DMICCLK4 90
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#define LOCHNAGAR2_PIN_CDC_DMICDAT4 91
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#define LOCHNAGAR2_PIN_DSP_DMICCLK1 92
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#define LOCHNAGAR2_PIN_DSP_DMICDAT1 93
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#define LOCHNAGAR2_PIN_DSP_DMICCLK2 94
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#define LOCHNAGAR2_PIN_DSP_DMICDAT2 95
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#define LOCHNAGAR2_PIN_I2C2_SCL 96
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#define LOCHNAGAR2_PIN_I2C2_SDA 97
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#define LOCHNAGAR2_PIN_I2C3_SCL 98
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#define LOCHNAGAR2_PIN_I2C3_SDA 99
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#define LOCHNAGAR2_PIN_I2C4_SCL 100
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#define LOCHNAGAR2_PIN_I2C4_SDA 101
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#define LOCHNAGAR2_PIN_DSP_STANDBY 102
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#define LOCHNAGAR2_PIN_CDC_MCLK1 103
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#define LOCHNAGAR2_PIN_CDC_MCLK2 104
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#define LOCHNAGAR2_PIN_DSP_CLKIN 105
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#define LOCHNAGAR2_PIN_PSIA1_MCLK 106
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#define LOCHNAGAR2_PIN_PSIA2_MCLK 107
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#define LOCHNAGAR2_PIN_GF_GPIO1 108
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#define LOCHNAGAR2_PIN_GF_GPIO5 109
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#define LOCHNAGAR2_PIN_DSP_GPIO20 110
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#define LOCHNAGAR2_PIN_NUM_GPIOS 111
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#endif
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