/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Qualcomm interconnect IDs
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*
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* Copyright (c) 2019, Linaro Ltd.
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* Author: Georgi Djakov <georgi.djakov@linaro.org>
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*/
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#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_MSM8916_H
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#define __DT_BINDINGS_INTERCONNECT_QCOM_MSM8916_H
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#define BIMC_SNOC_SLV 0
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#define MASTER_JPEG 1
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#define MASTER_MDP_PORT0 2
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#define MASTER_QDSS_BAM 3
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#define MASTER_QDSS_ETR 4
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#define MASTER_SNOC_CFG 5
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#define MASTER_VFE 6
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#define MASTER_VIDEO_P0 7
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#define SNOC_MM_INT_0 8
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#define SNOC_MM_INT_1 9
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#define SNOC_MM_INT_2 10
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#define SNOC_MM_INT_BIMC 11
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#define PCNOC_SNOC_SLV 12
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#define SLAVE_APSS 13
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#define SLAVE_CATS_128 14
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#define SLAVE_OCMEM_64 15
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#define SLAVE_IMEM 16
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#define SLAVE_QDSS_STM 17
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#define SLAVE_SRVC_SNOC 18
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#define SNOC_BIMC_0_MAS 19
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#define SNOC_BIMC_1_MAS 20
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#define SNOC_INT_0 21
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#define SNOC_INT_1 22
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#define SNOC_INT_BIMC 23
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#define SNOC_PCNOC_MAS 24
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#define SNOC_QDSS_INT 25
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#define BIMC_SNOC_MAS 0
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#define MASTER_AMPSS_M0 1
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#define MASTER_GRAPHICS_3D 2
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#define MASTER_TCU0 3
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#define MASTER_TCU1 4
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#define SLAVE_AMPSS_L2 5
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#define SLAVE_EBI_CH0 6
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#define SNOC_BIMC_0_SLV 7
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#define SNOC_BIMC_1_SLV 8
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#define MASTER_BLSP_1 0
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#define MASTER_DEHR 1
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#define MASTER_LPASS 2
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#define MASTER_CRYPTO_CORE0 3
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#define MASTER_SDCC_1 4
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#define MASTER_SDCC_2 5
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#define MASTER_SPDM 6
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#define MASTER_USB_HS 7
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#define PCNOC_INT_0 8
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#define PCNOC_INT_1 9
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#define PCNOC_MAS_0 10
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#define PCNOC_MAS_1 11
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#define PCNOC_SLV_0 12
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#define PCNOC_SLV_1 13
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#define PCNOC_SLV_2 14
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#define PCNOC_SLV_3 15
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#define PCNOC_SLV_4 16
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#define PCNOC_SLV_8 17
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#define PCNOC_SLV_9 18
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#define PCNOC_SNOC_MAS 19
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#define SLAVE_BIMC_CFG 20
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#define SLAVE_BLSP_1 21
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#define SLAVE_BOOT_ROM 22
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#define SLAVE_CAMERA_CFG 23
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#define SLAVE_CLK_CTL 24
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#define SLAVE_CRYPTO_0_CFG 25
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#define SLAVE_DEHR_CFG 26
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#define SLAVE_DISPLAY_CFG 27
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#define SLAVE_GRAPHICS_3D_CFG 28
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#define SLAVE_IMEM_CFG 29
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#define SLAVE_LPASS 30
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#define SLAVE_MPM 31
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#define SLAVE_MSG_RAM 32
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#define SLAVE_MSS 33
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#define SLAVE_PDM 34
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#define SLAVE_PMIC_ARB 35
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#define SLAVE_PCNOC_CFG 36
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#define SLAVE_PRNG 37
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#define SLAVE_QDSS_CFG 38
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#define SLAVE_RBCPR_CFG 39
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#define SLAVE_SDCC_1 40
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#define SLAVE_SDCC_2 41
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#define SLAVE_SECURITY 42
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#define SLAVE_SNOC_CFG 43
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#define SLAVE_SPDM 44
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#define SLAVE_TCSR 45
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#define SLAVE_TLMM 46
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#define SLAVE_USB_HS 47
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#define SLAVE_VENUS_CFG 48
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#define SNOC_PCNOC_SLV 49
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#endif
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