/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright 2014 Ulrich Hecht
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*/
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#ifndef __DT_BINDINGS_CLOCK_SH73A0_H__
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#define __DT_BINDINGS_CLOCK_SH73A0_H__
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/* CPG */
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#define SH73A0_CLK_MAIN 0
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#define SH73A0_CLK_PLL0 1
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#define SH73A0_CLK_PLL1 2
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#define SH73A0_CLK_PLL2 3
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#define SH73A0_CLK_PLL3 4
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#define SH73A0_CLK_DSI0PHY 5
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#define SH73A0_CLK_DSI1PHY 6
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#define SH73A0_CLK_ZG 7
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#define SH73A0_CLK_M3 8
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#define SH73A0_CLK_B 9
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#define SH73A0_CLK_M1 10
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#define SH73A0_CLK_M2 11
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#define SH73A0_CLK_Z 12
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#define SH73A0_CLK_ZX 13
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#define SH73A0_CLK_HP 14
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/* MSTP0 */
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#define SH73A0_CLK_IIC2 1
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#define SH73A0_CLK_MSIOF0 0
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/* MSTP1 */
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#define SH73A0_CLK_CEU1 29
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#define SH73A0_CLK_CSI2_RX1 28
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#define SH73A0_CLK_CEU0 27
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#define SH73A0_CLK_CSI2_RX0 26
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#define SH73A0_CLK_TMU0 25
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#define SH73A0_CLK_DSITX0 18
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#define SH73A0_CLK_IIC0 16
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#define SH73A0_CLK_SGX 12
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#define SH73A0_CLK_LCDC0 0
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/* MSTP2 */
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#define SH73A0_CLK_SCIFA7 19
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#define SH73A0_CLK_SY_DMAC 18
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#define SH73A0_CLK_MP_DMAC 17
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#define SH73A0_CLK_MSIOF3 15
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#define SH73A0_CLK_MSIOF1 8
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#define SH73A0_CLK_SCIFA5 7
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#define SH73A0_CLK_SCIFB 6
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#define SH73A0_CLK_MSIOF2 5
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#define SH73A0_CLK_SCIFA0 4
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#define SH73A0_CLK_SCIFA1 3
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#define SH73A0_CLK_SCIFA2 2
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#define SH73A0_CLK_SCIFA3 1
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#define SH73A0_CLK_SCIFA4 0
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/* MSTP3 */
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#define SH73A0_CLK_SCIFA6 31
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#define SH73A0_CLK_CMT1 29
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#define SH73A0_CLK_FSI 28
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#define SH73A0_CLK_IRDA 25
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#define SH73A0_CLK_IIC1 23
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#define SH73A0_CLK_USB 22
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#define SH73A0_CLK_FLCTL 15
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#define SH73A0_CLK_SDHI0 14
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#define SH73A0_CLK_SDHI1 13
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#define SH73A0_CLK_MMCIF0 12
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#define SH73A0_CLK_SDHI2 11
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#define SH73A0_CLK_TPU0 4
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#define SH73A0_CLK_TPU1 3
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#define SH73A0_CLK_TPU2 2
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#define SH73A0_CLK_TPU3 1
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#define SH73A0_CLK_TPU4 0
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/* MSTP4 */
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#define SH73A0_CLK_IIC3 11
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#define SH73A0_CLK_IIC4 10
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#define SH73A0_CLK_KEYSC 3
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/* MSTP5 */
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#define SH73A0_CLK_INTCA0 8
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#endif
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