// SPDX-License-Identifier: GPL-2.0+
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/*
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* Driver for Realtek PCI-Express card reader
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*
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* Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
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*
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* Author:
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* Wei WANG (wei_wang@realsil.com.cn)
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* Micky Ching (micky_ching@realsil.com.cn)
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*/
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#include <linux/blkdev.h>
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#include <linux/kthread.h>
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#include <linux/sched.h>
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#include <linux/workqueue.h>
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#include <linux/kernel.h>
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#include "rtsx.h"
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#include "sd.h"
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#include "xd.h"
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#include "ms.h"
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void do_remaining_work(struct rtsx_chip *chip)
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{
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struct sd_info *sd_card = &chip->sd_card;
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#ifdef XD_DELAY_WRITE
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struct xd_info *xd_card = &chip->xd_card;
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#endif
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struct ms_info *ms_card = &chip->ms_card;
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if (chip->card_ready & SD_CARD) {
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if (sd_card->seq_mode) {
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rtsx_set_stat(chip, RTSX_STAT_RUN);
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sd_card->cleanup_counter++;
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} else {
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sd_card->cleanup_counter = 0;
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}
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}
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#ifdef XD_DELAY_WRITE
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if (chip->card_ready & XD_CARD) {
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if (xd_card->delay_write.delay_write_flag) {
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rtsx_set_stat(chip, RTSX_STAT_RUN);
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xd_card->cleanup_counter++;
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} else {
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xd_card->cleanup_counter = 0;
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}
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}
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#endif
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if (chip->card_ready & MS_CARD) {
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if (CHK_MSPRO(ms_card)) {
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if (ms_card->seq_mode) {
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rtsx_set_stat(chip, RTSX_STAT_RUN);
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ms_card->cleanup_counter++;
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} else {
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ms_card->cleanup_counter = 0;
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}
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} else {
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#ifdef MS_DELAY_WRITE
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if (ms_card->delay_write.delay_write_flag) {
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rtsx_set_stat(chip, RTSX_STAT_RUN);
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ms_card->cleanup_counter++;
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} else {
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ms_card->cleanup_counter = 0;
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}
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#endif
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}
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}
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if (sd_card->cleanup_counter > POLLING_WAIT_CNT)
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sd_cleanup_work(chip);
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if (xd_card->cleanup_counter > POLLING_WAIT_CNT)
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xd_cleanup_work(chip);
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if (ms_card->cleanup_counter > POLLING_WAIT_CNT)
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ms_cleanup_work(chip);
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}
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void try_to_switch_sdio_ctrl(struct rtsx_chip *chip)
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{
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u8 reg1 = 0, reg2 = 0;
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rtsx_read_register(chip, 0xFF34, ®1);
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rtsx_read_register(chip, 0xFF38, ®2);
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dev_dbg(rtsx_dev(chip), "reg 0xFF34: 0x%x, reg 0xFF38: 0x%x\n",
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reg1, reg2);
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if ((reg1 & 0xC0) && (reg2 & 0xC0)) {
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chip->sd_int = 1;
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rtsx_write_register(chip, SDIO_CTRL, 0xFF,
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SDIO_BUS_CTRL | SDIO_CD_CTRL);
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rtsx_write_register(chip, PWR_GATE_CTRL,
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LDO3318_PWR_MASK, LDO_ON);
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}
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}
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#ifdef SUPPORT_SDIO_ASPM
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void dynamic_configure_sdio_aspm(struct rtsx_chip *chip)
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{
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u8 buf[12], reg;
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int i;
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for (i = 0; i < 12; i++)
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rtsx_read_register(chip, 0xFF08 + i, &buf[i]);
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rtsx_read_register(chip, 0xFF25, ®);
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if ((memcmp(buf, chip->sdio_raw_data, 12) != 0) || (reg & 0x03)) {
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chip->sdio_counter = 0;
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chip->sdio_idle = 0;
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} else {
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if (!chip->sdio_idle) {
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chip->sdio_counter++;
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if (chip->sdio_counter >= SDIO_IDLE_COUNT) {
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chip->sdio_counter = 0;
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chip->sdio_idle = 1;
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}
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}
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}
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memcpy(chip->sdio_raw_data, buf, 12);
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if (chip->sdio_idle) {
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if (!chip->sdio_aspm) {
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dev_dbg(rtsx_dev(chip), "SDIO enter ASPM!\n");
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rtsx_write_register(chip, ASPM_FORCE_CTL, 0xFC,
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0x30 | (chip->aspm_level[1] << 2));
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chip->sdio_aspm = 1;
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}
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} else {
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if (chip->sdio_aspm) {
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dev_dbg(rtsx_dev(chip), "SDIO exit ASPM!\n");
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rtsx_write_register(chip, ASPM_FORCE_CTL, 0xFC, 0x30);
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chip->sdio_aspm = 0;
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}
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}
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}
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#endif
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void do_reset_sd_card(struct rtsx_chip *chip)
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{
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int retval;
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dev_dbg(rtsx_dev(chip), "%s: %d, card2lun = 0x%x\n", __func__,
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chip->sd_reset_counter, chip->card2lun[SD_CARD]);
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if (chip->card2lun[SD_CARD] >= MAX_ALLOWED_LUN_CNT) {
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clear_bit(SD_NR, &chip->need_reset);
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chip->sd_reset_counter = 0;
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chip->sd_show_cnt = 0;
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return;
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}
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chip->rw_fail_cnt[chip->card2lun[SD_CARD]] = 0;
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rtsx_set_stat(chip, RTSX_STAT_RUN);
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rtsx_write_register(chip, SDIO_CTRL, 0xFF, 0);
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retval = reset_sd_card(chip);
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if (chip->need_release & SD_CARD)
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return;
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if (retval == STATUS_SUCCESS) {
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clear_bit(SD_NR, &chip->need_reset);
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chip->sd_reset_counter = 0;
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chip->sd_show_cnt = 0;
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chip->card_ready |= SD_CARD;
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chip->card_fail &= ~SD_CARD;
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chip->rw_card[chip->card2lun[SD_CARD]] = sd_rw;
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} else {
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if (chip->sd_io || (chip->sd_reset_counter >= MAX_RESET_CNT)) {
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clear_bit(SD_NR, &chip->need_reset);
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chip->sd_reset_counter = 0;
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chip->sd_show_cnt = 0;
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} else {
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chip->sd_reset_counter++;
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}
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chip->card_ready &= ~SD_CARD;
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chip->card_fail |= SD_CARD;
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chip->capacity[chip->card2lun[SD_CARD]] = 0;
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chip->rw_card[chip->card2lun[SD_CARD]] = NULL;
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rtsx_write_register(chip, CARD_OE, SD_OUTPUT_EN, 0);
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if (!chip->ft2_fast_mode)
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card_power_off(chip, SD_CARD);
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if (chip->sd_io) {
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chip->sd_int = 0;
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try_to_switch_sdio_ctrl(chip);
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} else {
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disable_card_clock(chip, SD_CARD);
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}
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}
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}
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void do_reset_xd_card(struct rtsx_chip *chip)
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{
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int retval;
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dev_dbg(rtsx_dev(chip), "%s: %d, card2lun = 0x%x\n", __func__,
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chip->xd_reset_counter, chip->card2lun[XD_CARD]);
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if (chip->card2lun[XD_CARD] >= MAX_ALLOWED_LUN_CNT) {
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clear_bit(XD_NR, &chip->need_reset);
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chip->xd_reset_counter = 0;
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chip->xd_show_cnt = 0;
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return;
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}
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chip->rw_fail_cnt[chip->card2lun[XD_CARD]] = 0;
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rtsx_set_stat(chip, RTSX_STAT_RUN);
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rtsx_write_register(chip, SDIO_CTRL, 0xFF, 0);
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retval = reset_xd_card(chip);
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if (chip->need_release & XD_CARD)
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return;
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if (retval == STATUS_SUCCESS) {
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clear_bit(XD_NR, &chip->need_reset);
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chip->xd_reset_counter = 0;
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chip->card_ready |= XD_CARD;
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chip->card_fail &= ~XD_CARD;
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chip->rw_card[chip->card2lun[XD_CARD]] = xd_rw;
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} else {
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if (chip->xd_reset_counter >= MAX_RESET_CNT) {
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clear_bit(XD_NR, &chip->need_reset);
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chip->xd_reset_counter = 0;
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chip->xd_show_cnt = 0;
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} else {
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chip->xd_reset_counter++;
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}
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chip->card_ready &= ~XD_CARD;
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chip->card_fail |= XD_CARD;
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chip->capacity[chip->card2lun[XD_CARD]] = 0;
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chip->rw_card[chip->card2lun[XD_CARD]] = NULL;
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rtsx_write_register(chip, CARD_OE, XD_OUTPUT_EN, 0);
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if (!chip->ft2_fast_mode)
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card_power_off(chip, XD_CARD);
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disable_card_clock(chip, XD_CARD);
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}
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}
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void do_reset_ms_card(struct rtsx_chip *chip)
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{
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int retval;
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dev_dbg(rtsx_dev(chip), "%s: %d, card2lun = 0x%x\n", __func__,
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chip->ms_reset_counter, chip->card2lun[MS_CARD]);
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if (chip->card2lun[MS_CARD] >= MAX_ALLOWED_LUN_CNT) {
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clear_bit(MS_NR, &chip->need_reset);
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chip->ms_reset_counter = 0;
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chip->ms_show_cnt = 0;
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return;
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}
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chip->rw_fail_cnt[chip->card2lun[MS_CARD]] = 0;
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rtsx_set_stat(chip, RTSX_STAT_RUN);
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rtsx_write_register(chip, SDIO_CTRL, 0xFF, 0);
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retval = reset_ms_card(chip);
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if (chip->need_release & MS_CARD)
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return;
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if (retval == STATUS_SUCCESS) {
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clear_bit(MS_NR, &chip->need_reset);
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chip->ms_reset_counter = 0;
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chip->card_ready |= MS_CARD;
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chip->card_fail &= ~MS_CARD;
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chip->rw_card[chip->card2lun[MS_CARD]] = ms_rw;
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} else {
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if (chip->ms_reset_counter >= MAX_RESET_CNT) {
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clear_bit(MS_NR, &chip->need_reset);
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chip->ms_reset_counter = 0;
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chip->ms_show_cnt = 0;
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} else {
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chip->ms_reset_counter++;
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}
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chip->card_ready &= ~MS_CARD;
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chip->card_fail |= MS_CARD;
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chip->capacity[chip->card2lun[MS_CARD]] = 0;
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chip->rw_card[chip->card2lun[MS_CARD]] = NULL;
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rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, 0);
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if (!chip->ft2_fast_mode)
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card_power_off(chip, MS_CARD);
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disable_card_clock(chip, MS_CARD);
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}
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}
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static void release_sdio(struct rtsx_chip *chip)
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{
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if (chip->sd_io) {
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rtsx_write_register(chip, CARD_STOP, SD_STOP | SD_CLR_ERR,
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SD_STOP | SD_CLR_ERR);
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if (chip->chip_insert_with_sdio) {
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chip->chip_insert_with_sdio = 0;
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if (CHECK_PID(chip, 0x5288))
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rtsx_write_register(chip, 0xFE5A, 0x08, 0x00);
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else
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rtsx_write_register(chip, 0xFE70, 0x80, 0x00);
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}
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rtsx_write_register(chip, SDIO_CTRL, SDIO_CD_CTRL, 0);
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chip->sd_io = 0;
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}
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}
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void rtsx_power_off_card(struct rtsx_chip *chip)
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{
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if ((chip->card_ready & SD_CARD) || chip->sd_io) {
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sd_cleanup_work(chip);
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sd_power_off_card3v3(chip);
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}
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if (chip->card_ready & XD_CARD) {
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xd_cleanup_work(chip);
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xd_power_off_card3v3(chip);
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}
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if (chip->card_ready & MS_CARD) {
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ms_cleanup_work(chip);
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ms_power_off_card3v3(chip);
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}
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}
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void rtsx_release_cards(struct rtsx_chip *chip)
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{
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chip->int_reg = rtsx_readl(chip, RTSX_BIPR);
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if ((chip->card_ready & SD_CARD) || chip->sd_io) {
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if (chip->int_reg & SD_EXIST)
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sd_cleanup_work(chip);
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release_sd_card(chip);
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}
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if (chip->card_ready & XD_CARD) {
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if (chip->int_reg & XD_EXIST)
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xd_cleanup_work(chip);
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release_xd_card(chip);
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}
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if (chip->card_ready & MS_CARD) {
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if (chip->int_reg & MS_EXIST)
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ms_cleanup_work(chip);
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release_ms_card(chip);
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}
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}
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void rtsx_reset_cards(struct rtsx_chip *chip)
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{
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if (!chip->need_reset)
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return;
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rtsx_set_stat(chip, RTSX_STAT_RUN);
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rtsx_force_power_on(chip, SSC_PDCTL | OC_PDCTL);
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rtsx_disable_aspm(chip);
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if ((chip->need_reset & SD_CARD) && chip->chip_insert_with_sdio)
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clear_bit(SD_NR, &chip->need_reset);
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if (chip->need_reset & XD_CARD) {
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chip->card_exist |= XD_CARD;
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if (chip->xd_show_cnt >= MAX_SHOW_CNT)
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do_reset_xd_card(chip);
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else
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chip->xd_show_cnt++;
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}
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if (CHECK_PID(chip, 0x5288) && CHECK_BARO_PKG(chip, QFN)) {
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if (chip->card_exist & XD_CARD) {
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clear_bit(SD_NR, &chip->need_reset);
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clear_bit(MS_NR, &chip->need_reset);
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}
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}
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if (chip->need_reset & SD_CARD) {
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chip->card_exist |= SD_CARD;
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if (chip->sd_show_cnt >= MAX_SHOW_CNT) {
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rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
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do_reset_sd_card(chip);
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} else {
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chip->sd_show_cnt++;
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}
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}
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if (chip->need_reset & MS_CARD) {
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chip->card_exist |= MS_CARD;
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if (chip->ms_show_cnt >= MAX_SHOW_CNT)
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do_reset_ms_card(chip);
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else
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chip->ms_show_cnt++;
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}
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}
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void rtsx_reinit_cards(struct rtsx_chip *chip, int reset_chip)
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{
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rtsx_set_stat(chip, RTSX_STAT_RUN);
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rtsx_force_power_on(chip, SSC_PDCTL | OC_PDCTL);
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if (reset_chip)
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rtsx_reset_chip(chip);
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chip->int_reg = rtsx_readl(chip, RTSX_BIPR);
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if ((chip->int_reg & SD_EXIST) && (chip->need_reinit & SD_CARD)) {
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release_sdio(chip);
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release_sd_card(chip);
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wait_timeout(100);
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chip->card_exist |= SD_CARD;
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do_reset_sd_card(chip);
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}
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if ((chip->int_reg & XD_EXIST) && (chip->need_reinit & XD_CARD)) {
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release_xd_card(chip);
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wait_timeout(100);
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chip->card_exist |= XD_CARD;
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do_reset_xd_card(chip);
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}
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if ((chip->int_reg & MS_EXIST) && (chip->need_reinit & MS_CARD)) {
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release_ms_card(chip);
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wait_timeout(100);
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chip->card_exist |= MS_CARD;
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do_reset_ms_card(chip);
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}
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chip->need_reinit = 0;
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}
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#ifdef DISABLE_CARD_INT
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void card_cd_debounce(struct rtsx_chip *chip, unsigned long *need_reset,
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unsigned long *need_release)
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{
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u8 release_map = 0, reset_map = 0;
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chip->int_reg = rtsx_readl(chip, RTSX_BIPR);
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if (chip->card_exist) {
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if (chip->card_exist & XD_CARD) {
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if (!(chip->int_reg & XD_EXIST))
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release_map |= XD_CARD;
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} else if (chip->card_exist & SD_CARD) {
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if (!(chip->int_reg & SD_EXIST))
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release_map |= SD_CARD;
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} else if (chip->card_exist & MS_CARD) {
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if (!(chip->int_reg & MS_EXIST))
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release_map |= MS_CARD;
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}
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} else {
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if (chip->int_reg & XD_EXIST)
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reset_map |= XD_CARD;
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else if (chip->int_reg & SD_EXIST)
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reset_map |= SD_CARD;
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else if (chip->int_reg & MS_EXIST)
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reset_map |= MS_CARD;
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}
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if (reset_map) {
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int xd_cnt = 0, sd_cnt = 0, ms_cnt = 0;
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int i;
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for (i = 0; i < (DEBOUNCE_CNT); i++) {
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chip->int_reg = rtsx_readl(chip, RTSX_BIPR);
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if (chip->int_reg & XD_EXIST)
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xd_cnt++;
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else
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xd_cnt = 0;
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if (chip->int_reg & SD_EXIST)
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sd_cnt++;
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else
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sd_cnt = 0;
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if (chip->int_reg & MS_EXIST)
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ms_cnt++;
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else
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ms_cnt = 0;
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wait_timeout(30);
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}
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reset_map = 0;
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if (!(chip->card_exist & XD_CARD) &&
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(xd_cnt > (DEBOUNCE_CNT - 1)))
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reset_map |= XD_CARD;
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if (!(chip->card_exist & SD_CARD) &&
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(sd_cnt > (DEBOUNCE_CNT - 1)))
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reset_map |= SD_CARD;
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if (!(chip->card_exist & MS_CARD) &&
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(ms_cnt > (DEBOUNCE_CNT - 1)))
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reset_map |= MS_CARD;
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}
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if (CHECK_PID(chip, 0x5288) && CHECK_BARO_PKG(chip, QFN))
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rtsx_write_register(chip, HOST_SLEEP_STATE, 0xC0, 0x00);
|
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if (need_reset)
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*need_reset = reset_map;
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if (need_release)
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*need_release = release_map;
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}
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#endif
|
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void rtsx_init_cards(struct rtsx_chip *chip)
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{
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if (RTSX_TST_DELINK(chip) && (rtsx_get_stat(chip) != RTSX_STAT_SS)) {
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dev_dbg(rtsx_dev(chip), "Reset chip in polling thread!\n");
|
rtsx_reset_chip(chip);
|
RTSX_CLR_DELINK(chip);
|
}
|
|
#ifdef DISABLE_CARD_INT
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card_cd_debounce(chip, &chip->need_reset, &chip->need_release);
|
#endif
|
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if (chip->need_release) {
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if (CHECK_PID(chip, 0x5288) && CHECK_BARO_PKG(chip, QFN)) {
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if (chip->int_reg & XD_EXIST) {
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clear_bit(SD_NR, &chip->need_release);
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clear_bit(MS_NR, &chip->need_release);
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}
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}
|
|
if (!(chip->card_exist & SD_CARD) && !chip->sd_io)
|
clear_bit(SD_NR, &chip->need_release);
|
if (!(chip->card_exist & XD_CARD))
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clear_bit(XD_NR, &chip->need_release);
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if (!(chip->card_exist & MS_CARD))
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clear_bit(MS_NR, &chip->need_release);
|
|
dev_dbg(rtsx_dev(chip), "chip->need_release = 0x%x\n",
|
(unsigned int)(chip->need_release));
|
|
#ifdef SUPPORT_OCP
|
if (chip->need_release) {
|
if (chip->ocp_stat & (CARD_OC_NOW | CARD_OC_EVER))
|
rtsx_write_register(chip, OCPCLR,
|
CARD_OC_INT_CLR |
|
CARD_OC_CLR,
|
CARD_OC_INT_CLR |
|
CARD_OC_CLR);
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chip->ocp_stat = 0;
|
}
|
#endif
|
if (chip->need_release) {
|
rtsx_set_stat(chip, RTSX_STAT_RUN);
|
rtsx_force_power_on(chip, SSC_PDCTL | OC_PDCTL);
|
}
|
|
if (chip->need_release & SD_CARD) {
|
clear_bit(SD_NR, &chip->need_release);
|
chip->card_exist &= ~SD_CARD;
|
chip->card_ejected &= ~SD_CARD;
|
chip->card_fail &= ~SD_CARD;
|
CLR_BIT(chip->lun_mc, chip->card2lun[SD_CARD]);
|
chip->rw_fail_cnt[chip->card2lun[SD_CARD]] = 0;
|
rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
|
|
release_sdio(chip);
|
release_sd_card(chip);
|
}
|
|
if (chip->need_release & XD_CARD) {
|
clear_bit(XD_NR, &chip->need_release);
|
chip->card_exist &= ~XD_CARD;
|
chip->card_ejected &= ~XD_CARD;
|
chip->card_fail &= ~XD_CARD;
|
CLR_BIT(chip->lun_mc, chip->card2lun[XD_CARD]);
|
chip->rw_fail_cnt[chip->card2lun[XD_CARD]] = 0;
|
|
release_xd_card(chip);
|
|
if (CHECK_PID(chip, 0x5288) &&
|
CHECK_BARO_PKG(chip, QFN))
|
rtsx_write_register(chip, HOST_SLEEP_STATE,
|
0xC0, 0xC0);
|
}
|
|
if (chip->need_release & MS_CARD) {
|
clear_bit(MS_NR, &chip->need_release);
|
chip->card_exist &= ~MS_CARD;
|
chip->card_ejected &= ~MS_CARD;
|
chip->card_fail &= ~MS_CARD;
|
CLR_BIT(chip->lun_mc, chip->card2lun[MS_CARD]);
|
chip->rw_fail_cnt[chip->card2lun[MS_CARD]] = 0;
|
|
release_ms_card(chip);
|
}
|
|
dev_dbg(rtsx_dev(chip), "chip->card_exist = 0x%x\n",
|
chip->card_exist);
|
|
if (!chip->card_exist)
|
turn_off_led(chip, LED_GPIO);
|
}
|
|
if (chip->need_reset) {
|
dev_dbg(rtsx_dev(chip), "chip->need_reset = 0x%x\n",
|
(unsigned int)(chip->need_reset));
|
|
rtsx_reset_cards(chip);
|
}
|
|
if (chip->need_reinit) {
|
dev_dbg(rtsx_dev(chip), "chip->need_reinit = 0x%x\n",
|
(unsigned int)(chip->need_reinit));
|
|
rtsx_reinit_cards(chip, 0);
|
}
|
}
|
|
int switch_ssc_clock(struct rtsx_chip *chip, int clk)
|
{
|
int retval;
|
u8 n = (u8)(clk - 2), min_n, max_n;
|
u8 mcu_cnt, div, max_div, ssc_depth, ssc_depth_mask;
|
int sd_vpclk_phase_reset = 0;
|
|
if (chip->cur_clk == clk)
|
return STATUS_SUCCESS;
|
|
min_n = 60;
|
max_n = 120;
|
max_div = CLK_DIV_4;
|
|
dev_dbg(rtsx_dev(chip), "Switch SSC clock to %dMHz (cur_clk = %d)\n",
|
clk, chip->cur_clk);
|
|
if ((clk <= 2) || (n > max_n))
|
return STATUS_FAIL;
|
|
mcu_cnt = (u8)(125 / clk + 3);
|
if (mcu_cnt > 7)
|
mcu_cnt = 7;
|
|
div = CLK_DIV_1;
|
while ((n < min_n) && (div < max_div)) {
|
n = (n + 2) * 2 - 2;
|
div++;
|
}
|
dev_dbg(rtsx_dev(chip), "n = %d, div = %d\n", n, div);
|
|
if (chip->ssc_en) {
|
ssc_depth = 0x01;
|
n -= 2;
|
} else {
|
ssc_depth = 0;
|
}
|
|
ssc_depth_mask = 0x03;
|
|
dev_dbg(rtsx_dev(chip), "ssc_depth = %d\n", ssc_depth);
|
|
rtsx_init_cmd(chip);
|
rtsx_add_cmd(chip, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, CLK_LOW_FREQ);
|
rtsx_add_cmd(chip, WRITE_REG_CMD, CLK_DIV, 0xFF, (div << 4) | mcu_cnt);
|
rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, 0);
|
rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_CTL2, ssc_depth_mask, ssc_depth);
|
rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_DIV_N_0, 0xFF, n);
|
rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, SSC_RSTB);
|
if (sd_vpclk_phase_reset) {
|
rtsx_add_cmd(chip, WRITE_REG_CMD, SD_VPCLK0_CTL,
|
PHASE_NOT_RESET, 0);
|
rtsx_add_cmd(chip, WRITE_REG_CMD, SD_VPCLK0_CTL,
|
PHASE_NOT_RESET, PHASE_NOT_RESET);
|
}
|
|
retval = rtsx_send_cmd(chip, 0, WAIT_TIME);
|
if (retval < 0)
|
return STATUS_ERROR;
|
|
udelay(10);
|
retval = rtsx_write_register(chip, CLK_CTL, CLK_LOW_FREQ, 0);
|
if (retval)
|
return retval;
|
|
chip->cur_clk = clk;
|
|
return STATUS_SUCCESS;
|
}
|
|
int switch_normal_clock(struct rtsx_chip *chip, int clk)
|
{
|
int retval;
|
u8 sel, div, mcu_cnt;
|
int sd_vpclk_phase_reset = 0;
|
|
if (chip->cur_clk == clk)
|
return STATUS_SUCCESS;
|
|
switch (clk) {
|
case CLK_20:
|
dev_dbg(rtsx_dev(chip), "Switch clock to 20MHz\n");
|
sel = SSC_80;
|
div = CLK_DIV_4;
|
mcu_cnt = 7;
|
break;
|
|
case CLK_30:
|
dev_dbg(rtsx_dev(chip), "Switch clock to 30MHz\n");
|
sel = SSC_120;
|
div = CLK_DIV_4;
|
mcu_cnt = 7;
|
break;
|
|
case CLK_40:
|
dev_dbg(rtsx_dev(chip), "Switch clock to 40MHz\n");
|
sel = SSC_80;
|
div = CLK_DIV_2;
|
mcu_cnt = 7;
|
break;
|
|
case CLK_50:
|
dev_dbg(rtsx_dev(chip), "Switch clock to 50MHz\n");
|
sel = SSC_100;
|
div = CLK_DIV_2;
|
mcu_cnt = 6;
|
break;
|
|
case CLK_60:
|
dev_dbg(rtsx_dev(chip), "Switch clock to 60MHz\n");
|
sel = SSC_120;
|
div = CLK_DIV_2;
|
mcu_cnt = 6;
|
break;
|
|
case CLK_80:
|
dev_dbg(rtsx_dev(chip), "Switch clock to 80MHz\n");
|
sel = SSC_80;
|
div = CLK_DIV_1;
|
mcu_cnt = 5;
|
break;
|
|
case CLK_100:
|
dev_dbg(rtsx_dev(chip), "Switch clock to 100MHz\n");
|
sel = SSC_100;
|
div = CLK_DIV_1;
|
mcu_cnt = 5;
|
break;
|
|
case CLK_120:
|
dev_dbg(rtsx_dev(chip), "Switch clock to 120MHz\n");
|
sel = SSC_120;
|
div = CLK_DIV_1;
|
mcu_cnt = 5;
|
break;
|
|
case CLK_150:
|
dev_dbg(rtsx_dev(chip), "Switch clock to 150MHz\n");
|
sel = SSC_150;
|
div = CLK_DIV_1;
|
mcu_cnt = 4;
|
break;
|
|
case CLK_200:
|
dev_dbg(rtsx_dev(chip), "Switch clock to 200MHz\n");
|
sel = SSC_200;
|
div = CLK_DIV_1;
|
mcu_cnt = 4;
|
break;
|
|
default:
|
dev_dbg(rtsx_dev(chip), "Try to switch to an illegal clock (%d)\n",
|
clk);
|
return STATUS_FAIL;
|
}
|
|
retval = rtsx_write_register(chip, CLK_CTL, 0xFF, CLK_LOW_FREQ);
|
if (retval)
|
return retval;
|
if (sd_vpclk_phase_reset) {
|
retval = rtsx_write_register(chip, SD_VPCLK0_CTL,
|
PHASE_NOT_RESET, 0);
|
if (retval)
|
return retval;
|
retval = rtsx_write_register(chip, SD_VPCLK1_CTL,
|
PHASE_NOT_RESET, 0);
|
if (retval)
|
return retval;
|
}
|
retval = rtsx_write_register(chip, CLK_DIV, 0xFF,
|
(div << 4) | mcu_cnt);
|
if (retval)
|
return retval;
|
retval = rtsx_write_register(chip, CLK_SEL, 0xFF, sel);
|
if (retval)
|
return retval;
|
|
if (sd_vpclk_phase_reset) {
|
udelay(200);
|
retval = rtsx_write_register(chip, SD_VPCLK0_CTL,
|
PHASE_NOT_RESET, PHASE_NOT_RESET);
|
if (retval)
|
return retval;
|
retval = rtsx_write_register(chip, SD_VPCLK1_CTL,
|
PHASE_NOT_RESET, PHASE_NOT_RESET);
|
if (retval)
|
return retval;
|
udelay(200);
|
}
|
retval = rtsx_write_register(chip, CLK_CTL, 0xFF, 0);
|
if (retval)
|
return retval;
|
|
chip->cur_clk = clk;
|
|
return STATUS_SUCCESS;
|
}
|
|
void trans_dma_enable(enum dma_data_direction dir, struct rtsx_chip *chip,
|
u32 byte_cnt, u8 pack_size)
|
{
|
if (pack_size > DMA_1024)
|
pack_size = DMA_512;
|
|
rtsx_add_cmd(chip, WRITE_REG_CMD, IRQSTAT0, DMA_DONE_INT, DMA_DONE_INT);
|
|
rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC3, 0xFF, (u8)(byte_cnt >> 24));
|
rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC2, 0xFF, (u8)(byte_cnt >> 16));
|
rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC1, 0xFF, (u8)(byte_cnt >> 8));
|
rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC0, 0xFF, (u8)byte_cnt);
|
|
if (dir == DMA_FROM_DEVICE) {
|
rtsx_add_cmd(chip, WRITE_REG_CMD, DMACTL,
|
0x03 | DMA_PACK_SIZE_MASK,
|
DMA_DIR_FROM_CARD | DMA_EN | pack_size);
|
} else {
|
rtsx_add_cmd(chip, WRITE_REG_CMD, DMACTL,
|
0x03 | DMA_PACK_SIZE_MASK,
|
DMA_DIR_TO_CARD | DMA_EN | pack_size);
|
}
|
|
rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER);
|
}
|
|
int enable_card_clock(struct rtsx_chip *chip, u8 card)
|
{
|
int retval;
|
u8 clk_en = 0;
|
|
if (card & XD_CARD)
|
clk_en |= XD_CLK_EN;
|
if (card & SD_CARD)
|
clk_en |= SD_CLK_EN;
|
if (card & MS_CARD)
|
clk_en |= MS_CLK_EN;
|
|
retval = rtsx_write_register(chip, CARD_CLK_EN, clk_en, clk_en);
|
if (retval)
|
return retval;
|
|
return STATUS_SUCCESS;
|
}
|
|
int disable_card_clock(struct rtsx_chip *chip, u8 card)
|
{
|
int retval;
|
u8 clk_en = 0;
|
|
if (card & XD_CARD)
|
clk_en |= XD_CLK_EN;
|
if (card & SD_CARD)
|
clk_en |= SD_CLK_EN;
|
if (card & MS_CARD)
|
clk_en |= MS_CLK_EN;
|
|
retval = rtsx_write_register(chip, CARD_CLK_EN, clk_en, 0);
|
if (retval)
|
return retval;
|
|
return STATUS_SUCCESS;
|
}
|
|
int card_power_on(struct rtsx_chip *chip, u8 card)
|
{
|
int retval;
|
u8 mask, val1, val2;
|
|
if (CHECK_LUN_MODE(chip, SD_MS_2LUN) && (card == MS_CARD)) {
|
mask = MS_POWER_MASK;
|
val1 = MS_PARTIAL_POWER_ON;
|
val2 = MS_POWER_ON;
|
} else {
|
mask = SD_POWER_MASK;
|
val1 = SD_PARTIAL_POWER_ON;
|
val2 = SD_POWER_ON;
|
}
|
|
rtsx_init_cmd(chip);
|
rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PWR_CTL, mask, val1);
|
|
retval = rtsx_send_cmd(chip, 0, 100);
|
if (retval != STATUS_SUCCESS)
|
return STATUS_FAIL;
|
|
udelay(chip->pmos_pwr_on_interval);
|
|
rtsx_init_cmd(chip);
|
rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PWR_CTL, mask, val2);
|
|
retval = rtsx_send_cmd(chip, 0, 100);
|
if (retval != STATUS_SUCCESS)
|
return STATUS_FAIL;
|
|
return STATUS_SUCCESS;
|
}
|
|
int card_power_off(struct rtsx_chip *chip, u8 card)
|
{
|
int retval;
|
u8 mask, val;
|
|
if (CHECK_LUN_MODE(chip, SD_MS_2LUN) && (card == MS_CARD)) {
|
mask = MS_POWER_MASK;
|
val = MS_POWER_OFF;
|
} else {
|
mask = SD_POWER_MASK;
|
val = SD_POWER_OFF;
|
}
|
|
retval = rtsx_write_register(chip, CARD_PWR_CTL, mask, val);
|
if (retval)
|
return retval;
|
|
return STATUS_SUCCESS;
|
}
|
|
int card_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip,
|
u32 sec_addr, u16 sec_cnt)
|
{
|
int retval;
|
unsigned int lun = SCSI_LUN(srb);
|
int i;
|
|
if (!chip->rw_card[lun])
|
return STATUS_FAIL;
|
|
for (i = 0; i < 3; i++) {
|
chip->rw_need_retry = 0;
|
|
retval = chip->rw_card[lun](srb, chip, sec_addr, sec_cnt);
|
if (retval != STATUS_SUCCESS) {
|
if (rtsx_check_chip_exist(chip) != STATUS_SUCCESS) {
|
rtsx_release_chip(chip);
|
return STATUS_FAIL;
|
}
|
if (detect_card_cd(chip, chip->cur_card) !=
|
STATUS_SUCCESS) {
|
return STATUS_FAIL;
|
}
|
|
if (!chip->rw_need_retry) {
|
dev_dbg(rtsx_dev(chip), "RW fail, but no need to retry\n");
|
break;
|
}
|
} else {
|
chip->rw_need_retry = 0;
|
break;
|
}
|
|
dev_dbg(rtsx_dev(chip), "Retry RW, (i = %d)\n", i);
|
}
|
|
return retval;
|
}
|
|
int card_share_mode(struct rtsx_chip *chip, int card)
|
{
|
int retval;
|
u8 mask, value;
|
|
if (CHECK_PID(chip, 0x5208)) {
|
mask = CARD_SHARE_MASK;
|
if (card == SD_CARD)
|
value = CARD_SHARE_48_SD;
|
else if (card == MS_CARD)
|
value = CARD_SHARE_48_MS;
|
else if (card == XD_CARD)
|
value = CARD_SHARE_48_XD;
|
else
|
return STATUS_FAIL;
|
|
} else if (CHECK_PID(chip, 0x5288)) {
|
mask = 0x03;
|
if (card == SD_CARD)
|
value = CARD_SHARE_BAROSSA_SD;
|
else if (card == MS_CARD)
|
value = CARD_SHARE_BAROSSA_MS;
|
else if (card == XD_CARD)
|
value = CARD_SHARE_BAROSSA_XD;
|
else
|
return STATUS_FAIL;
|
|
} else {
|
return STATUS_FAIL;
|
}
|
|
retval = rtsx_write_register(chip, CARD_SHARE_MODE, mask, value);
|
if (retval)
|
return retval;
|
|
return STATUS_SUCCESS;
|
}
|
|
int select_card(struct rtsx_chip *chip, int card)
|
{
|
int retval;
|
|
if (chip->cur_card != card) {
|
u8 mod;
|
|
if (card == SD_CARD)
|
mod = SD_MOD_SEL;
|
else if (card == MS_CARD)
|
mod = MS_MOD_SEL;
|
else if (card == XD_CARD)
|
mod = XD_MOD_SEL;
|
else if (card == SPI_CARD)
|
mod = SPI_MOD_SEL;
|
else
|
return STATUS_FAIL;
|
|
retval = rtsx_write_register(chip, CARD_SELECT, 0x07, mod);
|
if (retval)
|
return retval;
|
chip->cur_card = card;
|
|
retval = card_share_mode(chip, card);
|
if (retval != STATUS_SUCCESS)
|
return STATUS_FAIL;
|
}
|
|
return STATUS_SUCCESS;
|
}
|
|
void toggle_gpio(struct rtsx_chip *chip, u8 gpio)
|
{
|
u8 temp_reg;
|
|
rtsx_read_register(chip, CARD_GPIO, &temp_reg);
|
temp_reg ^= (0x01 << gpio);
|
rtsx_write_register(chip, CARD_GPIO, 0xFF, temp_reg);
|
}
|
|
void turn_on_led(struct rtsx_chip *chip, u8 gpio)
|
{
|
if (CHECK_PID(chip, 0x5288))
|
rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio),
|
(u8)(1 << gpio));
|
else
|
rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio), 0);
|
}
|
|
void turn_off_led(struct rtsx_chip *chip, u8 gpio)
|
{
|
if (CHECK_PID(chip, 0x5288))
|
rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio), 0);
|
else
|
rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio),
|
(u8)(1 << gpio));
|
}
|
|
int detect_card_cd(struct rtsx_chip *chip, int card)
|
{
|
u32 card_cd, status;
|
|
if (card == SD_CARD) {
|
card_cd = SD_EXIST;
|
} else if (card == MS_CARD) {
|
card_cd = MS_EXIST;
|
} else if (card == XD_CARD) {
|
card_cd = XD_EXIST;
|
} else {
|
dev_dbg(rtsx_dev(chip), "Wrong card type: 0x%x\n", card);
|
return STATUS_FAIL;
|
}
|
|
status = rtsx_readl(chip, RTSX_BIPR);
|
if (!(status & card_cd))
|
return STATUS_FAIL;
|
|
return STATUS_SUCCESS;
|
}
|
|
int check_card_exist(struct rtsx_chip *chip, unsigned int lun)
|
{
|
if (chip->card_exist & chip->lun2card[lun])
|
return 1;
|
|
return 0;
|
}
|
|
int check_card_ready(struct rtsx_chip *chip, unsigned int lun)
|
{
|
if (chip->card_ready & chip->lun2card[lun])
|
return 1;
|
|
return 0;
|
}
|
|
int check_card_wp(struct rtsx_chip *chip, unsigned int lun)
|
{
|
if (chip->card_wp & chip->lun2card[lun])
|
return 1;
|
|
return 0;
|
}
|
|
u8 get_lun_card(struct rtsx_chip *chip, unsigned int lun)
|
{
|
if ((chip->card_ready & chip->lun2card[lun]) == XD_CARD)
|
return (u8)XD_CARD;
|
else if ((chip->card_ready & chip->lun2card[lun]) == SD_CARD)
|
return (u8)SD_CARD;
|
else if ((chip->card_ready & chip->lun2card[lun]) == MS_CARD)
|
return (u8)MS_CARD;
|
|
return 0;
|
}
|
|
void eject_card(struct rtsx_chip *chip, unsigned int lun)
|
{
|
do_remaining_work(chip);
|
|
if ((chip->card_ready & chip->lun2card[lun]) == SD_CARD) {
|
release_sd_card(chip);
|
chip->card_ejected |= SD_CARD;
|
chip->card_ready &= ~SD_CARD;
|
chip->capacity[lun] = 0;
|
} else if ((chip->card_ready & chip->lun2card[lun]) == XD_CARD) {
|
release_xd_card(chip);
|
chip->card_ejected |= XD_CARD;
|
chip->card_ready &= ~XD_CARD;
|
chip->capacity[lun] = 0;
|
} else if ((chip->card_ready & chip->lun2card[lun]) == MS_CARD) {
|
release_ms_card(chip);
|
chip->card_ejected |= MS_CARD;
|
chip->card_ready &= ~MS_CARD;
|
chip->capacity[lun] = 0;
|
}
|
}
|
