/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
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*/
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#ifndef __RK_NAND_BASE_H
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#define __RK_NAND_BASE_H
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struct rk_nandc_info {
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int id;
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void __iomem *reg_base;
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int irq;
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int clk_rate;
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struct clk *clk; /* flash clk*/
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struct clk *hclk; /* nandc clk*/
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struct clk *gclk; /* flash clk gate*/
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};
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void *ftl_malloc(int size);
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void ftl_free(void *buf);
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char rknand_get_sn(char *pbuf);
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char rknand_get_vendor0(char *pbuf);
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char *rknand_get_idb_data(void);
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int rknand_get_clk_rate(int nandc_id);
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unsigned long rknand_dma_flush_dcache(unsigned long ptr, int size, int dir);
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unsigned long rknand_dma_map_single(unsigned long ptr, int size, int dir);
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void rknand_dma_unmap_single(unsigned long ptr, int size, int dir);
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int rknand_flash_cs_init(int id);
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int rknand_get_reg_addr(unsigned long *p_nandc0, unsigned long *p_nandc1);
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int rknand_get_boot_media(void);
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unsigned long rk_copy_from_user(void *to, const void __user *from,
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unsigned long n);
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unsigned long rk_copy_to_user(void __user *to, const void *from,
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unsigned long n);
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int rknand_sys_storage_init(void);
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int rknand_vendor_storage_init(void);
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int rk_nand_schedule_enable_config(int en);
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void rk_nandc_xfer_irq_flag_init(void *nandc_reg);
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void rk_nandc_rb_irq_flag_init(void *nandc_reg);
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void wait_for_nandc_xfer_completed(void *nandc_reg);
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void wait_for_nand_flash_ready(void *nandc_reg);
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int rk_nandc_irq_init(void);
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int rk_nandc_irq_deinit(void);
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void rknand_dev_cache_flush(void);
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#endif
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