/* SPDX-License-Identifier: GPL-2.0-or-later */
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/* Driver for Realtek PCI-Express card reader
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*
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* Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
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*
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* Author:
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* Wei WANG <wei_wang@realsil.com.cn>
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*/
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#ifndef __RTSX_PCR_H
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#define __RTSX_PCR_H
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#include <linux/rtsx_pci.h>
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#define MIN_DIV_N_PCR 80
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#define MAX_DIV_N_PCR 208
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#define RTS522A_PM_CTRL3 0xFF7E
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#define RTS524A_PME_FORCE_CTL 0xFF78
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#define REG_EFUSE_BYPASS 0x08
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#define REG_EFUSE_POR 0x04
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#define REG_EFUSE_POWER_MASK 0x03
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#define REG_EFUSE_POWERON 0x03
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#define REG_EFUSE_POWEROFF 0x00
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#define RTS5250_CLK_CFG3 0xFF79
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#define RTS525A_CFG_MEM_PD 0xF0
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#define RTS524A_PM_CTRL3 0xFF7E
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#define RTS525A_BIOS_CFG 0xFF2D
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#define RTS525A_LOAD_BIOS_FLAG 0x01
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#define RTS525A_CLEAR_BIOS_FLAG 0x00
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#define RTS525A_EFUSE_CTL 0xFC32
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#define REG_EFUSE_ENABLE 0x80
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#define REG_EFUSE_MODE 0x40
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#define RTS525A_EFUSE_ADD 0xFC33
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#define REG_EFUSE_ADD_MASK 0x3F
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#define RTS525A_EFUSE_DATA 0xFC35
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#define LTR_ACTIVE_LATENCY_DEF 0x883C
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#define LTR_IDLE_LATENCY_DEF 0x892C
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#define LTR_L1OFF_LATENCY_DEF 0x9003
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#define L1_SNOOZE_DELAY_DEF 1
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#define LTR_L1OFF_SSPWRGATE_5249_DEF 0xAF
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#define LTR_L1OFF_SSPWRGATE_5250_DEF 0xFF
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#define LTR_L1OFF_SNOOZE_SSPWRGATE_5249_DEF 0xAC
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#define LTR_L1OFF_SNOOZE_SSPWRGATE_5250_DEF 0xF8
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#define CMD_TIMEOUT_DEF 100
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#define MASK_8_BIT_DEF 0xFF
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#define SSC_CLOCK_STABLE_WAIT 130
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#define RTS524A_OCP_THD_800 0x04
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#define RTS525A_OCP_THD_800 0x05
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#define RTS522A_OCP_THD_800 0x06
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int __rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val);
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int __rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val);
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void rts5209_init_params(struct rtsx_pcr *pcr);
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void rts5229_init_params(struct rtsx_pcr *pcr);
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void rtl8411_init_params(struct rtsx_pcr *pcr);
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void rtl8402_init_params(struct rtsx_pcr *pcr);
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void rts5227_init_params(struct rtsx_pcr *pcr);
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void rts522a_init_params(struct rtsx_pcr *pcr);
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void rts5249_init_params(struct rtsx_pcr *pcr);
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void rts524a_init_params(struct rtsx_pcr *pcr);
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void rts525a_init_params(struct rtsx_pcr *pcr);
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void rtl8411b_init_params(struct rtsx_pcr *pcr);
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void rts5260_init_params(struct rtsx_pcr *pcr);
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void rts5261_init_params(struct rtsx_pcr *pcr);
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void rts5228_init_params(struct rtsx_pcr *pcr);
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static inline u8 map_sd_drive(int idx)
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{
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u8 sd_drive[4] = {
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0x01, /* Type D */
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0x02, /* Type C */
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0x05, /* Type A */
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0x03 /* Type B */
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};
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return sd_drive[idx];
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}
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#define rtsx_vendor_setting_valid(reg) (!((reg) & 0x1000000))
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#define rts5209_vendor_setting1_valid(reg) (!((reg) & 0x80))
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#define rts5209_vendor_setting2_valid(reg) ((reg) & 0x80)
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#define rtsx_check_mmc_support(reg) ((reg) & 0x10)
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#define rtsx_reg_to_rtd3(reg) ((reg) & 0x02)
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#define rtsx_reg_to_aspm(reg) (((reg) >> 28) & 0x03)
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#define rtsx_reg_to_sd30_drive_sel_1v8(reg) (((reg) >> 26) & 0x03)
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#define rtsx_reg_to_sd30_drive_sel_3v3(reg) (((reg) >> 5) & 0x03)
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#define rtsx_reg_to_card_drive_sel(reg) ((((reg) >> 25) & 0x01) << 6)
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#define rtsx_reg_check_reverse_socket(reg) ((reg) & 0x4000)
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#define rts5209_reg_to_aspm(reg) (((reg) >> 5) & 0x03)
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#define rts5209_reg_check_ms_pmos(reg) (!((reg) & 0x08))
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#define rts5209_reg_to_sd30_drive_sel_1v8(reg) (((reg) >> 3) & 0x07)
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#define rts5209_reg_to_sd30_drive_sel_3v3(reg) ((reg) & 0x07)
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#define rts5209_reg_to_card_drive_sel(reg) ((reg) >> 8)
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#define rtl8411_reg_to_sd30_drive_sel_3v3(reg) (((reg) >> 5) & 0x07)
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#define rtl8411b_reg_to_sd30_drive_sel_3v3(reg) ((reg) & 0x03)
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#define set_pull_ctrl_tables(pcr, __device) \
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do { \
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pcr->sd_pull_ctl_enable_tbl = __device##_sd_pull_ctl_enable_tbl; \
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pcr->sd_pull_ctl_disable_tbl = __device##_sd_pull_ctl_disable_tbl; \
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pcr->ms_pull_ctl_enable_tbl = __device##_ms_pull_ctl_enable_tbl; \
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pcr->ms_pull_ctl_disable_tbl = __device##_ms_pull_ctl_disable_tbl; \
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} while (0)
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/* generic operations */
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int rtsx_gops_pm_reset(struct rtsx_pcr *pcr);
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int rtsx_set_ltr_latency(struct rtsx_pcr *pcr, u32 latency);
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int rtsx_set_l1off_sub(struct rtsx_pcr *pcr, u8 val);
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void rtsx_pci_init_ocp(struct rtsx_pcr *pcr);
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void rtsx_pci_disable_ocp(struct rtsx_pcr *pcr);
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void rtsx_pci_enable_ocp(struct rtsx_pcr *pcr);
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int rtsx_pci_get_ocpstat(struct rtsx_pcr *pcr, u8 *val);
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void rtsx_pci_clear_ocpstat(struct rtsx_pcr *pcr);
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void rtsx_pci_enable_oobs_polling(struct rtsx_pcr *pcr);
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void rtsx_pci_disable_oobs_polling(struct rtsx_pcr *pcr);
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int rtsx_sd_power_off_card3v3(struct rtsx_pcr *pcr);
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int rtsx_ms_power_off_card3v3(struct rtsx_pcr *pcr);
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#endif
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