/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) STMicroelectronics SA 2017 - All Rights Reserved
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* Author: Gerald Baeza <gerald.baeza@st.com> for STMicroelectronics.
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*/
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#ifdef CONFIG_STM32F4_DEBUG_UART
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#define STM32_USART_SR_OFF 0x00
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#define STM32_USART_TDR_OFF 0x04
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#endif
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#if defined(CONFIG_STM32F7_DEBUG_UART) || defined(CONFIG_STM32H7_DEBUG_UART) || \
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defined(CONFIG_STM32MP1_DEBUG_UART)
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#define STM32_USART_SR_OFF 0x1C
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#define STM32_USART_TDR_OFF 0x28
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#endif
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#define STM32_USART_TC (1 << 6) /* Tx complete */
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#define STM32_USART_TXE (1 << 7) /* Tx data reg empty */
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.macro addruart, rp, rv, tmp
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ldr \rp, =CONFIG_DEBUG_UART_PHYS @ physical base
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ldr \rv, =CONFIG_DEBUG_UART_VIRT @ virt base
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.endm
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.macro senduart,rd,rx
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strb \rd, [\rx, #STM32_USART_TDR_OFF]
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.endm
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.macro waituartcts,rd,rx
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.endm
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.macro waituarttxrdy,rd,rx
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1001: ldr \rd, [\rx, #(STM32_USART_SR_OFF)] @ Read Status Register
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tst \rd, #STM32_USART_TXE @ TXE = 1 = tx empty
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beq 1001b
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.endm
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.macro busyuart,rd,rx
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1001: ldr \rd, [\rx, #(STM32_USART_SR_OFF)] @ Read Status Register
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tst \rd, #STM32_USART_TC @ TC = 1 = tx complete
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beq 1001b
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.endm
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