/*
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*
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* (C) COPYRIGHT 2022 ARM Limited. All rights reserved.
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*
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* This program is free software and is provided to you under the terms of the
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* GNU General Public License version 2 as published by the Free Software
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* Foundation) and any use by you of this program is subject to the terms
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* of such GNU licence.
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*
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* A copy of the licence is included with the program) and can also be obtained
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* from Free Software Foundation) Inc.) 51 Franklin Street) Fifth Floor)
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* Boston) MA 02110-1301) USA.
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*
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*/
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What: /sys/bus/coresight/devices/mali-source-etm/enable_source
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Description:
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Attribute used to enable Coresight Source ETM.
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What: /sys/bus/coresight/devices/mali-source-etm/is_enabled
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Description:
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Attribute used to check if Coresight Source ITM is enabled.
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What: /sys/bus/coresight/devices/mali-source-etm/trcconfigr
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Description:
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Coresight Source ETM trace configuration to enable global
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timestamping, and data value tracing.
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What: /sys/bus/coresight/devices/mali-source-etm/trctraceidr
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Description:
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Coresight Source ETM trace ID.
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What: /sys/bus/coresight/devices/mali-source-etm/trcvdarcctlr
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Description:
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Coresight Source ETM viewData include/exclude address
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range comparators.
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What: /sys/bus/coresight/devices/mali-source-etm/trcviiectlr
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Description:
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Coresight Source ETM viewInst include and exclude control.
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What: /sys/bus/coresight/devices/mali-source-etm/trcstallctlr
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Description:
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Coresight Source ETM stall control register.
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What: /sys/bus/coresight/devices/mali-source-itm/enable_source
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Description:
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Attribute used to enable Coresight Source ITM.
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What: /sys/bus/coresight/devices/mali-source-itm/is_enabled
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Description:
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Attribute used to check if Coresight Source ITM is enabled.
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What: /sys/bus/coresight/devices/mali-source-itm/dwt_ctrl
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Description:
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Coresight Source DWT configuration:
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[0] = 1, enable cycle counter
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[4:1] = 4, set PC sample rate pf 256 cycles
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[8:5] = 1, set initial post count value
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[9] = 1, select position of post count tap on the cycle counter
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[10:11] = 1, enable sync packets
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[12] = 1, enable periodic PC sample packets
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What: /sys/bus/coresight/devices/mali-source-itm/itm_tcr
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Description:
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Coresight Source ITM configuration:
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[0] = 1, Enable ITM
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[1] = 1, Enable Time stamp generation
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[2] = 1, Enable sync packet transmission
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[3] = 1, Enable HW event forwarding
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[11:10] = 1, Generate TS request approx every 128 cycles
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[22:16] = 1, Trace bus ID
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What: /sys/bus/coresight/devices/mali-source-ela/enable_source
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Description:
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Attribute used to enable Coresight Source ELA.
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What: /sys/bus/coresight/devices/mali-source-ela/is_enabled
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Description:
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Attribute used to check if Coresight Source ELA is enabled.
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What: /sys/bus/coresight/devices/mali-source-ela/select
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Description:
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Coresight Source ELA select trace mode:
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[0], NONE
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[1], JCN
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[2], CEU_EXEC
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[3], CEU_CMDS
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[4], MCU_AHBP
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[5], HOST_AXI
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[6], NR_TRACEMODE
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Refer to specification for more details.
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What: /sys/bus/coresight/devices/mali-source-ela/sigmask0
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Description:
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Coresight Source ELA SIGMASK0 register set/get.
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Refer to specification for more details.
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What: /sys/bus/coresight/devices/mali-source-ela/sigmask4
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Description:
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Coresight Source ELA SIGMASK4 register set/get.
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Refer to specification for more details.
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What: /sys/bus/coresight/devices/mali-source-ela/sigcomp0
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Description:
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Coresight Source ELA SIGCOMP0 register set/get.
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Refer to specification for more details.
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What: /sys/bus/coresight/devices/mali-source-ela/sigcomp4
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Description:
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Coresight Source ELA SIGCOMP4 register set/get.
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Refer to specification for more details.
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