/** @file
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Copyright (c) 2016, Linaro Limited. All rights reserved.
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Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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*/
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#include <Base.h>
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#include <Library/ArmLib.h>
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#include <Library/ArmMmuLib.h>
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#include <Library/CacheMaintenanceLib.h>
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#include <Library/DebugLib.h>
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EFI_STATUS
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EFIAPI
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ArmMmuPeiLibConstructor (
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IN EFI_PEI_FILE_HANDLE FileHandle,
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IN CONST EFI_PEI_SERVICES **PeiServices
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)
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{
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extern UINT32 ArmReplaceLiveTranslationEntrySize;
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EFI_FV_FILE_INFO FileInfo;
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EFI_STATUS Status;
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ASSERT (FileHandle != NULL);
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Status = (*PeiServices)->FfsGetFileInfo (FileHandle, &FileInfo);
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ASSERT_EFI_ERROR (Status);
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//
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// Some platforms do not cope very well with cache maintenance being
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// performed on regions backed by NOR flash. Since the firmware image
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// can be assumed to be clean to the PoC when running XIP, even when PEI
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// is executing from DRAM, we only need to perform the cache maintenance
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// when not executing in place.
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//
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if ((UINTN)FileInfo.Buffer <= (UINTN)ArmReplaceLiveTranslationEntry &&
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((UINTN)FileInfo.Buffer + FileInfo.BufferSize >=
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(UINTN)ArmReplaceLiveTranslationEntry + ArmReplaceLiveTranslationEntrySize)) {
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DEBUG ((EFI_D_INFO, "ArmMmuLib: skipping cache maintenance on XIP PEIM\n"));
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} else {
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DEBUG ((EFI_D_INFO, "ArmMmuLib: performing cache maintenance on shadowed PEIM\n"));
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//
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// The ArmReplaceLiveTranslationEntry () helper function may be invoked
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// with the MMU off so we have to ensure that it gets cleaned to the PoC
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//
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WriteBackDataCacheRange ((VOID *)(UINTN)ArmReplaceLiveTranslationEntry,
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ArmReplaceLiveTranslationEntrySize);
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}
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return RETURN_SUCCESS;
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}
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