/******************************************************************************
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*
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* Copyright(c) 2019 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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******************************************************************************/
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#include "power_saving.h"
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#include "coex.h"
|
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#define RPWM_SEQ_NUM_MAX 3
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#define CPWM_SEQ_NUM_MAX 3
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//RPWM bit definition
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#define PS_RPWM_TOGGLE BIT(15)
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#define PS_RPWM_ACK BIT(14)
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#define PS_RPWM_SEQ_NUM_SH 12
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#define PS_RPWM_SEQ_NUM_MSK 0x3
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#define PS_RPWM_NOTIFY_WAKE BIT(8)
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#define PS_RPWM_STATE_SH 0
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#define PS_RPWM_STATE_MSK 0x7
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//CPWM bit definition
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#define PS_CPWM_TOGGLE BIT(15)
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#define PS_CPWM_ACK BIT(14)
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#define PS_CPWM_SEQ_NUM_SH 12
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#define PS_CPWM_SEQ_NUM_MSK 0x3
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#define PS_CPWM_RSP_SEQ_NUM_SH 8
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#define PS_CPWM_RSP_SEQ_NUM_MSK 0x3
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#define PS_CPWM_STATE_SH 0
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#define PS_CPWM_STATE_MSK 0x7
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//(workaround) CPWM register is in OFF area
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//LPS debug message bit definition
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#define B_PS_LDM_32K_EN BIT(31)
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#define B_PS_LDM_32K_EN_SH 31
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static u32 lps_status[4] = {0};
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static u32 ips_status[4] = {0};
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static u8 rpwm_seq_num = RPWM_SEQ_NUM_MAX;
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static u8 cpwm_seq_num = CPWM_SEQ_NUM_MAX;
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static u32 send_h2c_lps_parm(struct mac_ax_adapter *adapter,
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struct lps_parm *parm)
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{
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u8 *buf;
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#if MAC_AX_PHL_H2C
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struct rtw_h2c_pkt *h2cb;
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#else
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struct h2c_buf *h2cb;
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#endif
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struct fwcmd_lps_parm *fwcmd_lps;
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u32 ret = 0;
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h2cb = h2cb_alloc(adapter, H2CB_CLASS_CMD);
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if (!h2cb)
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return MACNPTR;
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buf = h2cb_put(h2cb, sizeof(struct fwcmd_lps_parm));
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if (!buf) {
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ret = MACNOBUF;
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goto fail;
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}
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fwcmd_lps = (struct fwcmd_lps_parm *)buf;
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fwcmd_lps->dword0 =
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cpu_to_le32(SET_WORD(parm->macid, FWCMD_H2C_LPS_PARM_MACID) |
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SET_WORD(parm->psmode, FWCMD_H2C_LPS_PARM_PSMODE) |
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SET_WORD(parm->rlbm, FWCMD_H2C_LPS_PARM_RLBM) |
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SET_WORD(parm->smartps, FWCMD_H2C_LPS_PARM_SMARTPS) |
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SET_WORD(parm->awakeinterval,
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FWCMD_H2C_LPS_PARM_AWAKEINTERVAL));
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fwcmd_lps->dword1 =
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cpu_to_le32((parm->vouapsd ? FWCMD_H2C_LPS_PARM_VOUAPSD : 0) |
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(parm->viuapsd ? FWCMD_H2C_LPS_PARM_VIUAPSD : 0) |
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(parm->beuapsd ? FWCMD_H2C_LPS_PARM_BEUAPSD : 0) |
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(parm->bkuapsd ? FWCMD_H2C_LPS_PARM_BKUAPSD : 0) |
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SET_WORD(parm->lastrpwm, FWCMD_H2C_LPS_PARM_LASTRPWM));
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ret = h2c_pkt_set_hdr(adapter, h2cb,
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FWCMD_TYPE_H2C,
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FWCMD_H2C_CAT_MAC,
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FWCMD_H2C_CL_PS,
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FWCMD_H2C_FUNC_LPS_PARM,
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0,
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1);
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if (ret)
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goto fail;
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ret = h2c_pkt_build_txd(adapter, h2cb);
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if (ret)
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goto fail;
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#if MAC_AX_PHL_H2C
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ret = PLTFM_TX(h2cb);
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#else
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ret = PLTFM_TX(h2cb->data, h2cb->len);
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#endif
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if (ret)
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goto fail;
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h2cb_free(adapter, h2cb);
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return MACSUCCESS;
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fail:
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h2cb_free(adapter, h2cb);
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return ret;
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}
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static void send_rpwm(struct mac_ax_adapter *adapter,
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struct ps_rpwm_parm *parm)
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{
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u16 rpwm_value = 0;
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u8 toggle = 0;
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struct mac_ax_intf_ops *ops = adapter_to_intf_ops(adapter);
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if (rpwm_seq_num == RPWM_SEQ_NUM_MAX)
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rpwm_seq_num = 0;
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else
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rpwm_seq_num += 1;
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rpwm_value = MAC_REG_R16(R_AX_RPWM);
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if (0 == (rpwm_value & PS_RPWM_TOGGLE))
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toggle = 1;
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if (parm->notify_wake) {
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rpwm_value = (PS_RPWM_NOTIFY_WAKE |
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SET_CLR_WORD(rpwm_value, rpwm_seq_num, PS_RPWM_SEQ_NUM));
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} else {
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rpwm_value = (SET_WORD(parm->req_pwr_state, PS_RPWM_STATE) |
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SET_WORD(rpwm_seq_num, PS_RPWM_SEQ_NUM));
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if (parm->req_pwr_state == MAC_AX_RPWM_REQ_PWR_STATE_ACTIVE ||
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parm->req_pwr_state == MAC_AX_RPWM_REQ_PWR_STATE_BAND0_RFON ||
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parm->req_pwr_state == MAC_AX_RPWM_REQ_PWR_STATE_BAND1_RFON ||
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parm->req_pwr_state == MAC_AX_RPWM_REQ_PWR_STATE_BAND0_RFOFF ||
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parm->req_pwr_state == MAC_AX_RPWM_REQ_PWR_STATE_BAND1_RFOFF)
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rpwm_value |= PS_RPWM_ACK;
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if (parm->req_pwr_state == MAC_AX_RPWM_REQ_PWR_STATE_CLK_GATED ||
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parm->req_pwr_state == MAC_AX_RPWM_REQ_PWR_STATE_PWR_GATED ||
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parm->req_pwr_state == MAC_AX_RPWM_REQ_PWR_STATE_HIOE_PWR_GATED) {
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adapter->mac_pwr_info.pwr_in_lps = 1;
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}
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}
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if (toggle == 1)
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rpwm_value |= PS_RPWM_TOGGLE;
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else
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rpwm_value &= ~PS_RPWM_TOGGLE;
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switch (adapter->hw_info->intf) {
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#if MAC_AX_USB_SUPPORT
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case MAC_AX_INTF_USB:
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#if MAC_AX_8852A_SUPPORT || MAC_AX_8852B_SUPPORT
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if (is_chip_id(adapter, MAC_AX_CHIP_ID_8852A) ||
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is_chip_id(adapter, MAC_AX_CHIP_ID_8852B))
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MAC_REG_W16(R_AX_USB_D2F_F2D_INFO + 2, rpwm_value);
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#endif
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#if MAC_AX_8852C_SUPPORT || MAC_AX_8192XB_SUPPORT
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if (is_chip_id(adapter, MAC_AX_CHIP_ID_8852C) ||
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is_chip_id(adapter, MAC_AX_CHIP_ID_8192XB))
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MAC_REG_W16(R_AX_USB_D2F_F2D_INFO_V1 + 2, rpwm_value);
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#endif
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break;
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#endif //MAC_AX_USB_SUPPORT
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#if MAC_AX_SDIO_SUPPORT
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case MAC_AX_INTF_SDIO:
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#if MAC_AX_8852A_SUPPORT || MAC_AX_8852B_SUPPORT
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if (is_chip_id(adapter, MAC_AX_CHIP_ID_8852A) ||
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is_chip_id(adapter, MAC_AX_CHIP_ID_8852B))
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MAC_REG_W16(R_AX_SDIO_HRPWM1 + 2, rpwm_value);
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#endif
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#if MAC_AX_8852C_SUPPORT || MAC_AX_8192XB_SUPPORT
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if (is_chip_id(adapter, MAC_AX_CHIP_ID_8852C) ||
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is_chip_id(adapter, MAC_AX_CHIP_ID_8192XB))
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MAC_REG_W16(R_AX_SDIO_HRPWM1_V1 + 2, rpwm_value);
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#endif
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if (parm->req_pwr_state == MAC_AX_RPWM_REQ_PWR_STATE_CLK_GATED ||
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parm->req_pwr_state == MAC_AX_RPWM_REQ_PWR_STATE_PWR_GATED ||
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parm->req_pwr_state == MAC_AX_RPWM_REQ_PWR_STATE_HIOE_PWR_GATED)
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adapter->sdio_info.tx_seq = 1;
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break;
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#endif //MAC_AX_SDIO_SUPPORT
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#if MAC_AX_PCIE_SUPPORT
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case MAC_AX_INTF_PCIE:
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#if MAC_AX_8852A_SUPPORT || MAC_AX_8852B_SUPPORT
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if (is_chip_id(adapter, MAC_AX_CHIP_ID_8852A) ||
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is_chip_id(adapter, MAC_AX_CHIP_ID_8852B))
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MAC_REG_W16(R_AX_PCIE_HRPWM, rpwm_value);
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#endif
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#if MAC_AX_8852C_SUPPORT || MAC_AX_8192XB_SUPPORT
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if (is_chip_id(adapter, MAC_AX_CHIP_ID_8852C) ||
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is_chip_id(adapter, MAC_AX_CHIP_ID_8192XB))
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MAC_REG_W16(R_AX_PCIE_HRPWM_V1, rpwm_value);
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#endif
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break;
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#endif //MAC_AX_PCIE_SUPPORT
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default:
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PLTFM_MSG_ERR("%s: invalid interface = %d!!\n",
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__func__, adapter->hw_info->intf);
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break;
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}
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PLTFM_MSG_TRACE("Send RPWM. rpwm_val=0x%x\n", rpwm_value);
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}
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static u32 leave_lps(struct mac_ax_adapter *adapter, u8 macid)
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{
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struct lps_parm h2c_lps_parm;
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u32 ret;
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PLTFM_MEMSET(&h2c_lps_parm, 0, sizeof(struct lps_parm));
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h2c_lps_parm.macid = macid;
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h2c_lps_parm.psmode = MAC_AX_PS_MODE_ACTIVE;
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h2c_lps_parm.lastrpwm = LAST_RPWM_ACTIVE;
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ret = send_h2c_lps_parm(adapter, &h2c_lps_parm);
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if (ret)
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return ret;
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lps_status[(macid >> 5)] &= ~BIT(macid & 0x1F);
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return MACSUCCESS;
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}
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static u32 enter_lps(struct mac_ax_adapter *adapter,
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u8 macid,
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struct mac_ax_lps_info *lps_info)
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{
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struct lps_parm h2c_lps_parm;
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u32 ret = 0;
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if (!lps_info) {
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PLTFM_MSG_ERR("[ERR]:LPS info is null\n");
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return MACNOITEM;
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}
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if (lps_status[(macid >> 5)] & BIT(macid & 0x1F))
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ret = leave_lps(adapter, macid);
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if (ret)
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return ret;
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PLTFM_MEMSET(&h2c_lps_parm, 0, sizeof(struct lps_parm));
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h2c_lps_parm.macid = macid;
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h2c_lps_parm.psmode = MAC_AX_PS_MODE_LEGACY;
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if (lps_info->listen_bcn_mode > MAC_AX_RLBM_USERDEFINE)
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lps_info->listen_bcn_mode = MAC_AX_RLBM_MIN;
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if (lps_info->listen_bcn_mode == MAC_AX_RLBM_USERDEFINE) {
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h2c_lps_parm.rlbm = MAC_AX_RLBM_USERDEFINE;
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h2c_lps_parm.awakeinterval = lps_info->awake_interval;
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if (h2c_lps_parm.awakeinterval == 0)
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h2c_lps_parm.awakeinterval = 1;
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} else if (lps_info->listen_bcn_mode == MAC_AX_RLBM_MAX) {
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h2c_lps_parm.rlbm = MAC_AX_RLBM_MAX;
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h2c_lps_parm.awakeinterval = 1;
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} else {
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h2c_lps_parm.rlbm = MAC_AX_RLBM_MIN;
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h2c_lps_parm.awakeinterval = 1;
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}
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h2c_lps_parm.smartps = lps_info->smart_ps_mode;
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h2c_lps_parm.lastrpwm = LAST_RPWM_PS;
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ret = send_h2c_lps_parm(adapter, &h2c_lps_parm);
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if (ret)
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return ret;
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lps_status[(macid >> 5)] |= BIT(macid & 0x1F);
|
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return MACSUCCESS;
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}
|
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static u32 set_req_pwr_state(struct mac_ax_adapter *adapter,
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enum mac_ax_rpwm_req_pwr_state req_pwr_state)
|
{
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struct ps_rpwm_parm parm;
|
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PLTFM_MEMSET(&parm, 0, sizeof(struct ps_rpwm_parm));
|
|
if (req_pwr_state >= MAC_AX_RPWM_REQ_PWR_STATE_MAX) {
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PLTFM_MSG_ERR("%s: invalid pwr state:%d\n",
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__func__, req_pwr_state);
|
return MACNOITEM;
|
}
|
|
parm.req_pwr_state = req_pwr_state;
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parm.notify_wake = 0;
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send_rpwm(adapter, &parm);
|
|
return MACSUCCESS;
|
}
|
|
static u32 _chk_cpwm_seq_num(u8 seq_num)
|
{
|
u32 ret;
|
|
if (cpwm_seq_num == CPWM_SEQ_NUM_MAX) {
|
if (seq_num == 0) {
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cpwm_seq_num = seq_num;
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ret = MACSUCCESS;
|
} else {
|
ret = MACCPWMSEQERR;
|
}
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} else {
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if (seq_num == (cpwm_seq_num + 1)) {
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cpwm_seq_num = seq_num;
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ret = MACSUCCESS;
|
} else {
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ret = MACCPWMSEQERR;
|
}
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}
|
|
return ret;
|
}
|
|
static u32 chk_cur_pwr_state(struct mac_ax_adapter *adapter,
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enum mac_ax_rpwm_req_pwr_state req_pwr_state)
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{
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u16 cpwm = 0;
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u32 rpwm_32k;
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u32 req_32k;
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struct mac_ax_intf_ops *ops = adapter_to_intf_ops(adapter);
|
|
if (req_pwr_state >= MAC_AX_RPWM_REQ_PWR_STATE_CLK_GATED)
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req_32k = 1;
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else
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req_32k = 0;
|
|
//(workaround) CPWM register is in OFF area
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//Use LDM to check if FW receives RPWM
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rpwm_32k = (MAC_REG_R32(R_AX_LDM) & B_PS_LDM_32K_EN) >> B_PS_LDM_32K_EN_SH;
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if (req_32k != rpwm_32k)
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return MACCPWMPWRSTATERR;
|
|
//There is no CPWM if 32K state
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if (req_32k)
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return MACSUCCESS;
|
|
#if MAC_AX_8852A_SUPPORT || MAC_AX_8852B_SUPPORT
|
if (is_chip_id(adapter, MAC_AX_CHIP_ID_8852A) ||
|
is_chip_id(adapter, MAC_AX_CHIP_ID_8852B))
|
cpwm = MAC_REG_R16(R_AX_CPWM);
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#endif
|
|
PLTFM_MSG_TRACE("Read CPWM=0x%x\n", cpwm);
|
if (rpwm_seq_num != GET_FIELD(cpwm, PS_CPWM_RSP_SEQ_NUM)) {
|
PLTFM_MSG_TRACE("RPWM seq mismatch!!: expect val:%d, Rx val:%d\n",
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rpwm_seq_num, GET_FIELD(cpwm, PS_CPWM_RSP_SEQ_NUM));
|
return MACCPWMSEQERR;
|
}
|
|
if (_chk_cpwm_seq_num(GET_FIELD(cpwm, PS_CPWM_SEQ_NUM)) == MACCPWMSEQERR) {
|
PLTFM_MSG_TRACE("CPWM seq mismatch!!: expect val:%d, Rx val:%d\n",
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cpwm_seq_num, GET_FIELD(cpwm, PS_CPWM_SEQ_NUM));
|
return MACCPWMSEQERR;
|
}
|
|
if (req_pwr_state != GET_FIELD(cpwm, PS_CPWM_STATE))
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return MACCPWMSTATERR;
|
|
adapter->mac_pwr_info.pwr_in_lps = 0;
|
|
return MACSUCCESS;
|
}
|
|
u32 mac_cfg_lps(struct mac_ax_adapter *adapter, u8 macid,
|
enum mac_ax_ps_mode ps_mode, struct mac_ax_lps_info *lps_info)
|
{
|
u32 ret = 0;
|
struct mac_ax_intf_ops *ops = adapter_to_intf_ops(adapter);
|
|
switch (ps_mode) {
|
case MAC_AX_PS_MODE_ACTIVE:
|
ret = leave_lps(adapter, macid);
|
/* patch form BT BG/LDO issue, ONLY FOR 52B CAV */
|
if (is_chip_id(adapter, MAC_AX_CHIP_ID_8852B) &&
|
is_cv(adapter, CAV))
|
MAC_REG_W8(R_AX_SCOREBOARD + 3, MAC_AX_NOTIFY_TP_MAJOR);
|
break;
|
case MAC_AX_PS_MODE_LEGACY:
|
ret = enter_lps(adapter, macid, lps_info);
|
/* patch form BT BG/LDO issue, ONLY FOR 52B CAV */
|
if (is_chip_id(adapter, MAC_AX_CHIP_ID_8852B) &&
|
is_cv(adapter, CAV))
|
MAC_REG_W8(R_AX_SCOREBOARD + 3, MAC_AX_NOTIFY_PWR_MAJOR);
|
break;
|
case MAC_AX_PS_MODE_WMMPS:
|
// TODO:
|
break;
|
default:
|
return MACNOITEM;
|
}
|
|
if (ret)
|
return ret;
|
|
return MACSUCCESS;
|
}
|
|
u32 mac_ps_pwr_state(struct mac_ax_adapter *adapter,
|
enum mac_ax_pwr_state_action action,
|
enum mac_ax_rpwm_req_pwr_state req_pwr_state)
|
{
|
u32 ret = MACSUCCESS;
|
|
switch (action) {
|
case MAC_AX_PWR_STATE_ACT_REQ:
|
ret = set_req_pwr_state(adapter, req_pwr_state);
|
break;
|
case MAC_AX_PWR_STATE_ACT_CHK:
|
ret = chk_cur_pwr_state(adapter, req_pwr_state);
|
break;
|
default:
|
ret = MACNOITEM;
|
}
|
|
return ret;
|
}
|
|
u32 mac_chk_leave_lps(struct mac_ax_adapter *adapter, u8 macid)
|
{
|
u8 band = 0;
|
u8 port = 0;
|
u32 chk_msk = 0;
|
struct mac_role_tbl *role;
|
u16 pwrbit_set_reg[2] = {R_AX_PPWRBIT_SETTING, R_AX_PPWRBIT_SETTING_C1};
|
u32 pwr_mgt_en_bit = 0xE;
|
struct mac_ax_intf_ops *ops = adapter_to_intf_ops(adapter);
|
u32 reg_pause = 0;
|
u32 reg_sleep = 0;
|
u8 macid_grp = macid >> MACID_GRP_SH;
|
u8 macid_sh = macid & MACID_GRP_MASK;
|
|
role = mac_role_srch(adapter, macid);
|
|
if (!role) {
|
PLTFM_MSG_ERR("[ERR]cannot find macid: %d\n", macid);
|
return MACNOITEM;
|
}
|
|
band = role->info.a_info.bb_sel;
|
port = role->info.a_info.port_int;
|
|
chk_msk = pwr_mgt_en_bit << (PORT_SH * port);
|
switch (macid_grp) {
|
case MACID_GRP_0:
|
reg_sleep = R_AX_MACID_SLEEP_0;
|
reg_pause = R_AX_SS_MACID_PAUSE_0;
|
break;
|
case MACID_GRP_1:
|
reg_sleep = R_AX_MACID_SLEEP_1;
|
reg_pause = R_AX_SS_MACID_PAUSE_1;
|
break;
|
case MACID_GRP_2:
|
reg_sleep = R_AX_MACID_SLEEP_2;
|
reg_pause = R_AX_SS_MACID_PAUSE_2;
|
break;
|
case MACID_GRP_3:
|
reg_sleep = R_AX_MACID_SLEEP_3;
|
reg_pause = R_AX_SS_MACID_PAUSE_3;
|
break;
|
default:
|
return MACPSSTATFAIL;
|
}
|
|
// Bypass Tx pause check during STOP SER period
|
if (adapter->sm.ser_ctrl_st != MAC_AX_SER_CTRL_STOP)
|
if (MAC_REG_R32(reg_pause) & BIT(macid_sh))
|
return MACPSSTATFAIL;
|
|
if ((MAC_REG_R32(pwrbit_set_reg[band]) & chk_msk) ||
|
(MAC_REG_R32(reg_sleep) & BIT(macid_sh)))
|
return MACPSSTATFAIL;
|
|
return MACSUCCESS;
|
}
|
|
u8 _is_in_lps(struct mac_ax_adapter *adapter)
|
{
|
u8 i;
|
|
for (i = 0; i < 4; i++) {
|
if (lps_status[i] != 0)
|
return 1;
|
}
|
|
return 0;
|
}
|
|
void reset_lps_seq_num(struct mac_ax_adapter *adapter)
|
{
|
rpwm_seq_num = RPWM_SEQ_NUM_MAX;
|
cpwm_seq_num = CPWM_SEQ_NUM_MAX;
|
}
|
|
static u32 send_h2c_ips_cfg(struct mac_ax_adapter *adapter,
|
struct ips_cfg *cfg)
|
{
|
u8 *buf;
|
#if MAC_AX_PHL_H2C
|
struct rtw_h2c_pkt *h2cb;
|
#else
|
struct h2c_buf *h2cb;
|
#endif
|
struct fwcmd_ips_cfg *fwcmd_ips;
|
u32 ret;
|
|
h2cb = h2cb_alloc(adapter, H2CB_CLASS_CMD);
|
if (!h2cb)
|
return MACNPTR;
|
|
buf = h2cb_put(h2cb, sizeof(struct fwcmd_ips_cfg));
|
if (!buf) {
|
h2cb_free(adapter, h2cb);
|
return MACNOBUF;
|
}
|
|
fwcmd_ips = (struct fwcmd_ips_cfg *)buf;
|
fwcmd_ips->dword0 =
|
cpu_to_le32(SET_WORD(cfg->macid, FWCMD_H2C_IPS_CFG_MACID) |
|
(cfg->enable ? FWCMD_H2C_IPS_CFG_ENABLE : 0));
|
|
ret = h2c_pkt_set_hdr(adapter, h2cb,
|
FWCMD_TYPE_H2C,
|
FWCMD_H2C_CAT_MAC,
|
FWCMD_H2C_CL_PS,
|
FWCMD_H2C_FUNC_IPS_CFG,
|
0,
|
1);
|
if (ret != MACSUCCESS) {
|
h2cb_free(adapter, h2cb);
|
return ret;
|
}
|
|
ret = h2c_pkt_build_txd(adapter, h2cb);
|
if (ret != MACSUCCESS) {
|
h2cb_free(adapter, h2cb);
|
return ret;
|
}
|
|
#if MAC_AX_PHL_H2C
|
ret = PLTFM_TX(h2cb);
|
#else
|
ret = PLTFM_TX(h2cb->data, h2cb->len);
|
#endif
|
if (ret != MACSUCCESS) {
|
h2cb_free(adapter, h2cb);
|
return ret;
|
}
|
|
h2cb_free(adapter, h2cb);
|
|
return MACSUCCESS;
|
}
|
|
static u32 leave_ips(struct mac_ax_adapter *adapter, u8 macid)
|
{
|
struct ips_cfg h2c_ips_cfg;
|
u32 ret;
|
|
PLTFM_MEMSET(&h2c_ips_cfg, 0, sizeof(struct ips_cfg));
|
|
h2c_ips_cfg.macid = macid;
|
h2c_ips_cfg.enable = 0;
|
|
ret = send_h2c_ips_cfg(adapter, &h2c_ips_cfg);
|
if (ret != MACSUCCESS)
|
return ret;
|
|
ips_status[(macid >> 5)] &= ~BIT(macid & 0x1F);
|
|
return MACSUCCESS;
|
}
|
|
static u32 enter_ips(struct mac_ax_adapter *adapter,
|
u8 macid)
|
{
|
struct ips_cfg h2c_ips_cfg;
|
u32 ret;
|
|
if (ips_status[(macid >> 5)] & BIT(macid & 0x1F)) {
|
PLTFM_MSG_ERR("[ERR]:IPS info is null\n");
|
ret = leave_ips(adapter, macid);
|
if (ret != MACSUCCESS)
|
return ret;
|
}
|
|
PLTFM_MEMSET(&h2c_ips_cfg, 0, sizeof(struct ips_cfg));
|
|
h2c_ips_cfg.macid = macid;
|
h2c_ips_cfg.enable = 1;
|
|
ret = send_h2c_ips_cfg(adapter, &h2c_ips_cfg);
|
if (ret != MACSUCCESS)
|
return ret;
|
|
ips_status[(macid >> 5)] |= BIT(macid & 0x1F);
|
|
return MACSUCCESS;
|
}
|
|
u32 mac_cfg_ips(struct mac_ax_adapter *adapter, u8 macid,
|
u8 enable)
|
{
|
u32 ret;
|
|
if (enable == 1)
|
ret = enter_ips(adapter, macid);
|
else
|
ret = leave_ips(adapter, macid);
|
|
return ret;
|
}
|
|
u32 mac_chk_leave_ips(struct mac_ax_adapter *adapter, u8 macid)
|
{
|
u8 band = 0;
|
u8 port = 0;
|
u32 chk_msk = 0;
|
struct mac_role_tbl *role;
|
u32 pwr_mgt_en_bit = 0xE;
|
struct mac_ax_intf_ops *ops = adapter_to_intf_ops(adapter);
|
u32 reg_pause = 0;
|
u32 reg_sleep = 0;
|
u8 macid_grp = macid >> MACID_GRP_SH;
|
u8 macid_sh = macid & MACID_GRP_MASK;
|
|
role = mac_role_srch(adapter, macid);
|
|
if (!role) {
|
PLTFM_MSG_ERR("[ERR]cannot find macid: %d\n", macid);
|
return MACNOITEM;
|
}
|
|
band = role->info.a_info.bb_sel;
|
port = role->info.a_info.port_int;
|
|
chk_msk = pwr_mgt_en_bit << (PORT_SH * port);
|
switch (macid_grp) {
|
case MACID_GRP_0:
|
reg_sleep = R_AX_MACID_SLEEP_0;
|
reg_pause = R_AX_SS_MACID_PAUSE_0;
|
break;
|
case MACID_GRP_1:
|
reg_sleep = R_AX_MACID_SLEEP_1;
|
reg_pause = R_AX_SS_MACID_PAUSE_1;
|
break;
|
case MACID_GRP_2:
|
reg_sleep = R_AX_MACID_SLEEP_2;
|
reg_pause = R_AX_SS_MACID_PAUSE_2;
|
break;
|
case MACID_GRP_3:
|
reg_sleep = R_AX_MACID_SLEEP_3;
|
reg_pause = R_AX_SS_MACID_PAUSE_3;
|
break;
|
default:
|
return MACPSSTATFAIL;
|
}
|
|
// Bypass Tx pause check during STOP SER period
|
if (adapter->sm.ser_ctrl_st != MAC_AX_SER_CTRL_STOP)
|
if (MAC_REG_R32(reg_pause) & BIT(macid_sh))
|
return MACPSSTATFAIL;
|
|
if (MAC_REG_R32(reg_sleep) & BIT(macid_sh))
|
return MACPSSTATFAIL;
|
|
return MACSUCCESS;
|
}
|
|
u8 _is_in_ips(struct mac_ax_adapter *adapter)
|
{
|
u8 i;
|
|
for (i = 0; i < 4; i++) {
|
if (ips_status[i] != 0)
|
return 1;
|
}
|
|
return 0;
|
}
|
|
u32 mac_ps_notify_wake(struct mac_ax_adapter *adapter)
|
{
|
struct ps_rpwm_parm parm;
|
|
PLTFM_MEMSET(&parm, 0, sizeof(struct ps_rpwm_parm));
|
|
if (adapter->mac_pwr_info.pwr_in_lps == 0) {
|
PLTFM_MSG_ERR("%s: Not in power saving!\n", __func__);
|
return MACPWRSTAT;
|
}
|
|
parm.notify_wake = 1;
|
send_rpwm(adapter, &parm);
|
|
return MACSUCCESS;
|
}
|
|
u32 mac_cfg_ps_advance_parm(struct mac_ax_adapter *adapter,
|
struct mac_ax_ps_adv_parm *parm)
|
{
|
u8 *buf;
|
#if MAC_AX_PHL_H2C
|
struct rtw_h2c_pkt *h2cb;
|
#else
|
struct h2c_buf *h2cb;
|
#endif
|
struct fwcmd_ps_advance_parm *fwcmd_parm;
|
u32 ret;
|
|
if (!parm)
|
return MACBADDR;
|
|
PLTFM_MSG_ALWAYS("%s: MACID(%d), TRXTimeOutTimeSet(%d), TRXTimeOutTimeVal(%d)!\n"
|
, __func__, parm->macid, parm->trxtimeouttimeset, parm->trxtimeouttimeval);
|
|
h2cb = h2cb_alloc(adapter, H2CB_CLASS_CMD);
|
if (!h2cb)
|
return MACNPTR;
|
|
buf = h2cb_put(h2cb, sizeof(struct fwcmd_ps_advance_parm));
|
if (!buf) {
|
h2cb_free(adapter, h2cb);
|
return MACNOBUF;
|
}
|
|
fwcmd_parm = (struct fwcmd_ps_advance_parm *)buf;
|
fwcmd_parm->dword0 =
|
cpu_to_le32(SET_WORD(parm->macid, FWCMD_H2C_PS_ADVANCE_PARM_MACID) |
|
SET_WORD(parm->trxtimeouttimeset, FWCMD_H2C_PS_ADVANCE_PARM_TRXTIMEOUTTIMESET));
|
fwcmd_parm->dword1 =
|
cpu_to_le32(SET_WORD(parm->trxtimeouttimeval, FWCMD_H2C_PS_ADVANCE_PARM_TRXTIMEOUTTIMEVAL));
|
|
ret = h2c_pkt_set_hdr(adapter, h2cb,
|
FWCMD_TYPE_H2C,
|
FWCMD_H2C_CAT_MAC,
|
FWCMD_H2C_CL_PS,
|
FWCMD_H2C_FUNC_PS_ADVANCE_PARM,
|
0,
|
1);
|
if (ret != MACSUCCESS) {
|
h2cb_free(adapter, h2cb);
|
return ret;
|
}
|
|
ret = h2c_pkt_build_txd(adapter, h2cb);
|
if (ret != MACSUCCESS) {
|
h2cb_free(adapter, h2cb);
|
return ret;
|
}
|
|
#if MAC_AX_PHL_H2C
|
ret = PLTFM_TX(h2cb);
|
#else
|
ret = PLTFM_TX(h2cb->data, h2cb->len);
|
#endif
|
if (ret != MACSUCCESS) {
|
h2cb_free(adapter, h2cb);
|
return ret;
|
}
|
|
h2cb_free(adapter, h2cb);
|
|
return MACSUCCESS;
|
}
|
