/******************************************************************************
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*
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* Copyright(c) 2007 - 2020 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#ifndef __HALBB_ENV_MNTR_EX_H__
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#define __HALBB_ENV_MNTR_EX_H__
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/*--------------------------[Define] ---------------------------------------*/
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/*NHM*/
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#define NHM_TH_NUM 11 /*threshold number of NHM*/
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#define NHM_RPT_NUM 12
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/*FAHM*/
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#define FAHM_INCLU_FA BIT(0)
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#define FAHM_INCLU_CRC_OK BIT(1)
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#define FAHM_INCLU_CRC_ERR BIT(2)
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#define FAHM_TH_NUM 11 /*threshold number of FAHM*/
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#define FAHM_RPT_NUM 12
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/*IFS-CLM*/
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#define IFS_CLM_NUM 4
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/*--------------------------[Enum]------------------------------------------*/
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enum mntr_result_lv {
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CCX_FAIL = 0,
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NHM_SUCCESS = BIT(0),
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CLM_SUCCESS = BIT(1),
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FAHM_SUCCESS = BIT(2),
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IFS_CLM_SUCCESS = BIT(3),
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EDCCA_CLM_SUCCESS = BIT(4),
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CCX_SUCCESS = 0x1f,
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};
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enum halbb_racing_lv {
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RAC_RELEASE = 0,
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RAC_LV_1 = 1, /* Low Priority function */
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RAC_LV_2 = 2, /* Middle Priority function */
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RAC_LV_3 = 3, /* High priority function (ex: Check hang function) */
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RAC_LV_4 = 4, /* Debug function (the highest priority) */
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RAC_MAX_NUM = 5
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};
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enum ccx_edcca_opt_sc_idx {
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CCX_EDCCA_SEG0_P0 = 0, /*seg0:p20*/
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CCX_EDCCA_SEG0_S1 = 1, /*seg0:s20*/
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CCX_EDCCA_SEG0_S2 = 2, /*seg0:s40, opposite of p20*/
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CCX_EDCCA_SEG0_S3 = 3, /*seg0:s40, opposite of s20*/
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CCX_EDCCA_SEG1_P0 = 4, /*seg1:p20*/
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CCX_EDCCA_SEG1_S1 = 5, /*seg1:s20*/
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CCX_EDCCA_SEG1_S2 = 6, /*seg1:s40, opposite of p20*/
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CCX_EDCCA_SEG1_S3 = 7 /*seg1:s40, opposite of s20*/
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};
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enum nhm_option_cca_all {
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NHM_EXCLUDE_CCA = 0,
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NHM_INCLUDE_CCA = 1,
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NHM_CCA_INIT
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};
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enum clm_opt_input {
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CLM_CCA_P20 = 0,
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CLM_CCA_S20 = 1,
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CLM_CCA_S40 = 2,
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CLM_CCA_S80 = 3,
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CLM_FROM_DBG = 4,
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CLM_TXON_CCA = 5,
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CLM_CCA_S80_S40_S20 = 6,
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CLM_CCA_S80_S40_S20_P20 = 7,
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CLM_CCA_INIT
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};
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enum nhm_application {
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NHM_INIT = 0,
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NHM_BACKGROUND = 1, /*IEEE 11K for background*/
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NHM_ACS = 2,
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NHM_DIG = 3,
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NHM_TDMA_DIG = 4,
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NHM_DBG_11K = 5, /*IEEE 11K for dbg cmd*/
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NHM_DBG_RSSI = 6, /*nhm_th[0]=rssi-20, th_ofst=3dB*/
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NHM_DBG_MANUAL = 7 /*nhm_th[0] & th_ofst is manual*/
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};
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enum clm_application {
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CLM_INIT = 0,
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CLM_BACKGROUND = 1,/*default*/
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CLM_ACS = 2,
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CLM_DIG = 3,
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CLM_TDMA_DIG = 4,
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CLM_DBG = 5
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};
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enum ifs_clm_application {
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IFS_CLM_INIT = 0,
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IFS_CLM_BACKGROUND = 1,/*default*/
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IFS_CLM_ACS = 2,
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IFS_CLM_DIG = 3,
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IFS_CLM_TDMA_DIG = 4,
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IFS_CLM_DBG = 5,
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IFS_CLM_DBG_MANUAL = 6
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};
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enum fahm_application {
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FAHM_INIT = 0,
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FAHM_BACKGROUND = 1, /*IEEE 11K for background*/
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FAHM_ACS = 2,
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FAHM_DIG = 3,
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FAHM_TDMA_DIG = 4,
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FAHM_DBG_11K = 5, /*IEEE 11K for dbg cmd*/
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FAHM_DBG_RSSI = 6, /*fahm_th[0]=rssi-20, th_ofst=3dB*/
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FAHM_DBG_MANUAL = 7 /*fahm_th[0] & th_ofst is manual*/
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};
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enum edcca_clm_application {
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EDCCA_CLM_INIT = 0,
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EDCCA_CLM_BACKGROUND = 1,/*default*/
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EDCCA_CLM_ACS = 2,
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EDCCA_CLM_DIG = 3,
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EDCCA_CLM_TDMA_DIG = 4,
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EDCCA_CLM_DBG = 5
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};
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/*--------------------------[Structure]-------------------------------------*/
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struct bb_info;
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struct env_trig_rpt {
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u8 ccx_rpt_stamp;
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};
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struct env_mntr_rpt {
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u8 ccx_rpt_stamp;
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u8 ccx_rpt_result;
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u8 clm_ratio; /*percent*/
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u16 clm_result; /*sample cnt*/
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u8 nhm_rpt[NHM_RPT_NUM]; /*percent*/
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u8 nhm_ratio; /*percent*/
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u8 nhm_tx_ratio; /*percent*/
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u8 nhm_cca_ratio; /*percent*/
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u8 nhm_idle_ratio; /*percent*/
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u16 nhm_tx_cnt; /*sample cnt*/
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u16 nhm_cca_cnt; /*sample cnt*/
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u16 nhm_idle_cnt; /*sample cnt*/
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u8 nhm_pwr; /*110+x(dBm), unit = 1dB*/
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u8 nhm_pwr_0p5; /*110+x/2(dBm), unit = 0.5dB*/
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u8 ifs_clm_tx_ratio; /*percent*/
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u8 ifs_clm_edcca_excl_cca_ratio; /*percent*/
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u8 ifs_clm_cck_fa_ratio; /*percent*/
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u8 ifs_clm_ofdm_fa_ratio; /*percent*/
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u8 ifs_clm_cck_cca_excl_fa_ratio; /*percent*/
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u8 ifs_clm_ofdm_cca_excl_fa_ratio; /*percent*/
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u16 ifs_clm_cck_fa_permil; /*permil*/
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u16 ifs_clm_ofdm_fa_permil; /*permil*/
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u16 ifs_clm_total_ifs; /*cnt*/
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u16 ifs_clm_his[IFS_CLM_NUM]; /*cnt*/
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u32 ifs_clm_ifs_avg[IFS_CLM_NUM]; /*us*/
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u32 ifs_clm_cca_avg[IFS_CLM_NUM]; /*us*/
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u8 fahm_rpt[FAHM_RPT_NUM]; /*percent*/
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u8 fahm_ratio; /*percent*/
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u8 fahm_denom_ratio; /*percent*/
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u8 fahm_pwr; /*110+x(dBm), unit = 1dB*/
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u8 fahm_pwr_0p5; /*110+x/2(dBm), unit = 0.5dB*/
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u8 edcca_clm_ratio; /*percent*/
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};
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struct ccx_para_info {
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enum halbb_racing_lv rac_lv;
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u16 mntr_time; /*0~2097ms*/
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enum ccx_edcca_opt_sc_idx ccx_edcca_opt_sc_idx;
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enum clm_application clm_app;
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enum clm_opt_input clm_input_opt;
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enum nhm_application nhm_app;
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u8 nhm_manual_th_ofst;
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u8 nhm_manual_th0; /*dbg manual mode*/
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enum nhm_option_cca_all nhm_incld_cca; /*Include CCA*/
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enum ifs_clm_application ifs_clm_app;
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u32 ifs_clm_manual_th_times;
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u32 ifs_clm_manual_th0;/*us*/
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enum fahm_application fahm_app;
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u8 fahm_manual_th_ofst;
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u8 fahm_manual_th0; /*dbg manual mode*/
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u8 fahm_numer_opt;
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u8 fahm_denom_opt;
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enum edcca_clm_application edcca_clm_app;
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};
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/*--------------------------[Prptotype]-------------------------------------*/
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void halbb_env_mntr_get_bg_result(struct bb_info *bb,
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struct env_mntr_rpt *bg_rpt,
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enum phl_phy_idx phy_idx);
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void halbb_env_mntr_get_bg_setting(struct bb_info *bb,
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struct ccx_para_info *bg_para,
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enum phl_phy_idx phy_idx);
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u8 halbb_env_mntr_trigger(struct bb_info *bb, struct ccx_para_info *para,
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struct env_trig_rpt *trig_rpt);
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u8 halbb_env_mntr_result(struct bb_info *bb, struct env_mntr_rpt *rpt);
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u8 halbb_env_mntr_get_802_11_k_rsni(struct bb_info *bb, s8 rcpi, s8 anpi);
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#endif
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