/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#include "../halbb_precomp.h"
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#ifdef BB_8852B_SUPPORT
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void halbb_cfg_rf_reg_8852b(struct bb_info *bb, u32 addr, u32 data,
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enum rf_path rf_path, u32 reg_addr)
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{
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}
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void halbb_cfg_rf_radio_a_8852b(struct bb_info *bb, u32 addr, u32 data)
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{
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}
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void halbb_cfg_rf_radio_b_8852b(struct bb_info *bb, u32 addr, u32 data)
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{
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}
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void halbb_cfg_bb_phy_8852b(struct bb_info *bb, u32 addr, u32 data,
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enum phl_phy_idx phy_idx)
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{
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#ifdef HALBB_DBCC_SUPPORT
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u32 ofst = 0;
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#endif
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if (addr == 0xfe) {
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halbb_delay_ms(bb, 50);
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BB_DBG(bb, DBG_INIT, "Delay 50 ms\n");
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} else if (addr == 0xfd) {
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halbb_delay_ms(bb, 5);
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BB_DBG(bb, DBG_INIT, "Delay 5 ms\n");
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} else if (addr == 0xfc) {
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halbb_delay_ms(bb, 1);
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BB_DBG(bb, DBG_INIT, "Delay 1 ms\n");
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} else if (addr == 0xfb) {
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halbb_delay_us(bb, 50);
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BB_DBG(bb, DBG_INIT, "Delay 50 us\n");
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} else if (addr == 0xfa) {
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halbb_delay_us(bb, 5);
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BB_DBG(bb, DBG_INIT, "Delay 5 us\n");
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} else if (addr == 0xf9) {
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halbb_delay_us(bb, 1);
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BB_DBG(bb, DBG_INIT, "Delay 1 us\n");
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} else {
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#ifdef HALBB_DBCC_SUPPORT
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if ((bb->hal_com->dbcc_en || bb->bb_dbg_i.cr_dbg_mode_en) &&
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phy_idx == HW_PHY_1) {
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ofst = halbb_phy0_to_phy1_ofst(bb, addr);
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if (ofst == 0)
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return;
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addr += ofst;
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} else {
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phy_idx = HW_PHY_0;
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}
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BB_DBG(bb, DBG_INIT, "[REG][%d]0x%04X = 0x%08X\n", phy_idx, addr, data);
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#else
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BB_DBG(bb, DBG_INIT, "[REG]0x%04X = 0x%08X\n", addr, data);
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#endif
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halbb_set_reg(bb, addr, MASKDWORD, data);
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}
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}
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void halbb_cfg_bb_gain_8852b(struct bb_info *bb, u32 addr, u32 data)
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{
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struct bb_gain_info *gain = &bb->bb_gain_i;
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u8 cfg_type = (u8)((addr & 0xff000000) >> 24);
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enum bb_band_t band_idx = (enum bb_band_t)((addr & 0xff0000) >> 16);
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u8 path = (u8)((addr & 0xff00) >> 8);
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u8 type;
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u8 i = 0;
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if (band_idx >= BB_GAIN_BAND_NUM)
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return;
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if (path >= HALBB_MAX_PATH)
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return;
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if (addr == 0xfe) {
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halbb_delay_ms(bb, 50);
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BB_DBG(bb, DBG_INIT, "Delay 50 ms\n");
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} else if (addr == 0xfd) {
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halbb_delay_ms(bb, 5);
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BB_DBG(bb, DBG_INIT, "Delay 5 ms\n");
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} else if (addr == 0xfc) {
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halbb_delay_ms(bb, 1);
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BB_DBG(bb, DBG_INIT, "Delay 1 ms\n");
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} else if (addr == 0xfb) {
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halbb_delay_us(bb, 50);
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BB_DBG(bb, DBG_INIT, "Delay 50 us\n");
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} else if (addr == 0xfa) {
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halbb_delay_us(bb, 5);
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BB_DBG(bb, DBG_INIT, "Delay 5 us\n");
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} else if (addr == 0xf9) {
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halbb_delay_us(bb, 1);
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BB_DBG(bb, DBG_INIT, "Delay 1 us\n");
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} else if (cfg_type ==0) { /*GAIN ERROR*/
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type = (u8)(addr & 0xff);
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if (type == 0) {
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for (i = 0; i < 4; i++)
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gain->lna_gain[band_idx][path][i] = (data >> (8 * i)) & 0xff;
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} else if (type == 1) {
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for (i = 0; i < 3; i++)
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gain->lna_gain[band_idx][path][4 + i] = (data >> (8 * i)) & 0xff;
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} else if (type == 2) {
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for (i = 0; i < 2; i++)
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gain->tia_gain[band_idx][path][i] = (data >> (8 * i)) & 0xff;
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}
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} else if (cfg_type == 1) { /*RPL Offset*/
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halbb_cfg_bb_rpl_ofst(bb, band_idx, path, addr, data);
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} else {
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BB_WARNING("cfg_type=%d\n", cfg_type);
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}
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}
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#endif
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