/** @file */
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/******************************************************************************
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*
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* Copyright(c) 2019 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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******************************************************************************/
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#ifndef _MAC_AX_FWDL_H_
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#define _MAC_AX_FWDL_H_
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#include "../type.h"
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#include "fwcmd.h"
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#include "trx_desc.h"
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#include "trxcfg.h"
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#include "dle.h"
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#include "hci_fc.h"
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#include "power_saving.h"
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#if MAC_AX_PCIE_SUPPORT
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#include "_pcie.h"
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#endif
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#if MAC_AX_8852A_SUPPORT
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#include "../fw_ax/rtl8852a/hal8852a_fw.h"
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#endif
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#if MAC_AX_8852B_SUPPORT
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#include "../fw_ax/rtl8852b/hal8852b_fw_u1.h"
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#include "../fw_ax/rtl8852b/hal8852b_fw.h"
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#endif
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#define FWHDR_HDR_LEN (sizeof(struct fwhdr_hdr_t))
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#define FWHDR_SECTION_LEN (sizeof(struct fwhdr_section_t))
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#define ROMDL_SEG_LEN 0x40000
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#define AX_BOOT_REASON_PWR_ON 0
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#define AX_BOOT_REASON_WDT 1
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#define AX_BOOT_REASON_LPS 2
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#define RTL8852A_ID 0x50
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#define RTL8852B_ID 0x51
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#define RTL8852C_ID 0x52
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#define RTL8834A_ID 0x53
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#define RTL8852A_ROM_ADDR 0x18900000
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#define RTL8852B_ROM_ADDR 0x18900000
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#define RTL8852C_ROM_ADDR 0x20000000
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#define RTL8192XB_ROM_ADDR 0x20000000
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/**
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* @struct fwhdr_hdr_t
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* @brief fwhdr_hdr_t
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*
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* @var fwhdr_hdr_t::dword0
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* Please Place Description here.
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* @var fwhdr_hdr_t::dword1
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* Please Place Description here.
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* @var fwhdr_hdr_t::dword2
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* Please Place Description here.
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* @var fwhdr_hdr_t::dword3
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* Please Place Description here.
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* @var fwhdr_hdr_t::dword4
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* Please Place Description here.
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* @var fwhdr_hdr_t::dword5
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* Please Place Description here.
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* @var fwhdr_hdr_t::dword6
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* Please Place Description here.
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* @var fwhdr_hdr_t::dword7
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* Please Place Description here.
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*/
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struct fwhdr_hdr_t {
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u32 dword0;
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u32 dword1;
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u32 dword2;
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u32 dword3;
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u32 dword4;
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u32 dword5;
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u32 dword6;
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u32 dword7;
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};
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/**
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* @struct fwhdr_section_t
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* @brief fwhdr_section_t
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*
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* @var fwhdr_section_t::dword0
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* Please Place Description here.
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* @var fwhdr_section_t::dword1
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* Please Place Description here.
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* @var fwhdr_section_t::dword2
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* Please Place Description here.
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* @var fwhdr_section_t::dword3
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* Please Place Description here.
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*/
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struct fwhdr_section_t {
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u32 dword0;
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u32 dword1;
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u32 dword2;
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u32 dword3;
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};
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/**
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* @enum fw_dl_status
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*
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* @brief fw_dl_status
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*
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* @var fw_dl_status::FWDL_INITIAL_STATE
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* Please Place Description here.
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* @var fw_dl_status::FWDL_FWDL_ONGOING
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* Please Place Description here.
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* @var fw_dl_status::FWDL_CHECKSUM_FAIL
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* Please Place Description here.
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* @var fw_dl_status::FWDL_SECURITY_FAIL
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* Please Place Description here.
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* @var fw_dl_status::FWDL_CUT_NOT_MATCH
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* Please Place Description here.
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* @var fw_dl_status::FWDL_RSVD0
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* Please Place Description here.
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* @var fw_dl_status::FWDL_WCPU_FWDL_RDY
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* Please Place Description here.
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* @var fw_dl_status::FWDL_WCPU_FW_INIT_RDY
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* Please Place Description here.
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*/
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enum fw_dl_status {
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FWDL_INITIAL_STATE = 0,
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FWDL_FWDL_ONGOING = 1,
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FWDL_CHECKSUM_FAIL = 2,
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FWDL_SECURITY_FAIL = 3,
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FWDL_CUT_NOT_MATCH = 4,
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FWDL_RSVD0 = 5,
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FWDL_WCPU_FWDL_RDY = 6,
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FWDL_WCPU_FW_INIT_RDY = 7
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};
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/**
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* @enum fw_dl_cv
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*
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* @brief fw_dl_cv
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*
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* @var fw_dl_chip_cut::FWDL_CAV
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* Please Place Description here.
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* @var fw_dl_chip_cut::FWDL_CBV
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* Please Place Description here.
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* @var fw_dl_chip_cut::FWDL_CCV
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* Please Place Description here.
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* @var fw_dl_chip_cut::FWDL_CDV
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* Please Place Description here.
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* @var fw_dl_chip_cut::FWDL_CEV
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* Please Place Description here.
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* @var fw_dl_chip_cut::FWDL_CFV
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* Please Place Description here.
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* @var fw_dl_chip_cut::FWDL_CGV
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* Please Place Description here.
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* @var fw_dl_chip_cut::FWDL_CHV
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* Please Place Description here.
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* @var fw_dl_chip_cut::FWDL_CIV
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* Please Place Description here.
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*/
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enum fw_dl_cv {
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FWDL_CAV = 0,
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FWDL_CBV = 1,
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FWDL_CCV,
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FWDL_CDV,
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FWDL_CEV,
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FWDL_CFV,
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FWDL_CGV,
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FWDL_CHV,
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FWDL_CIV,
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};
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/* === FW header === */
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/* dword0 */
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#define FWHDR_CUTID_SH 0
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#define FWHDR_CUTID_MSK 0xff
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#define FWHDR_CHIPID_SH 8
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#define FWHDR_CHIPID_MSK 0xffffff
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/* dword1 */
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#define FWHDR_MAJORVER_SH 0
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#define FWHDR_MAJORVER_MSK 0xff
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#define FWHDR_MINORVER_SH 8
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#define FWHDR_MINORVER_MSK 0xff
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#define FWHDR_SUBVERSION_SH 16
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#define FWHDR_SUBVERSION_MSK 0xff
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#define FWHDR_SUBINDEX_SH 24
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#define FWHDR_SUBINDEX_MSK 0xff
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/* dword2 */
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#define FWHDR_COMMITID_SH 0
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#define FWHDR_COMMITID_MSK 0xffffffff
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/* dword3 */
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#define FWHDR_SEC_HDR_OFFSET_SH 0
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#define FWHDR_SEC_HDR_OFFSET_MSK 0xff
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#define FWHDR_SEC_HDR_SZ_SH 8
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#define FWHDR_SEC_HDR_SZ_MSK 0xff
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#define FWHDR_FWHDR_SZ_SH 16
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#define FWHDR_FWHDR_SZ_MSK 0xff
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#define FWHDR_FWHDR_VER_SH 24
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#define FWHDR_FWHDR_VER_MSK 0xff
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/* dword4 */
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#define FWHDR_MONTH_SH 0
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#define FWHDR_MONTH_MSK 0xff
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#define FWHDR_DATE_SH 8
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#define FWHDR_DATE_MSK 0xff
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#define FWHDR_HOUR_SH 16
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#define FWHDR_HOUR_MSK 0xff
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#define FWHDR_MIN_SH 24
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#define FWHDR_MIN_MSK 0xff
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/* dword5 */
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#define FWHDR_YEAR_SH 0
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#define FWHDR_YEAR_MSK 0xffff
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/* dword6 */
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#define FWHDR_IMAGEFROM_SH 0
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#define FWHDR_IMAGEFROM_MSK 0x3
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#define FWHDR_BOOTFROM_SH 4
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#define FWHDR_BOOTFROM_MSK 0x3
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#define FWHDR_ROM_ONLY BIT(6)
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#define FWHDR_FW_TYPE BIT(7)
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#define FWHDR_SEC_NUM_SH 8
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#define FWHDR_SEC_NUM_MSK 0xff
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#define FWHDR_HCI_TYPE_SH 16
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#define FWHDR_HCI_TYPE_MSK 0xf
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#define FWHDR_NET_TYPE_SH 20
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#define FWHDR_NET_TYPE_MSK 0xf
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/* dword7 */
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#define FWHDR_FW_PART_SZ_SH 0
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#define FWHDR_FW_PART_SZ_MSK 0xffff
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#define FWHDR_CMD_VER_SH 24
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#define FWHDR_CMD_VER_MSK 0xff
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/* === Section header === */
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/* dword0 */
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#define SECTION_INFO_SEC_DL_ADDR_SH 0
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#define SECTION_INFO_SEC_DL_ADDR_MSK 0xffffffff
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/* dword1 */
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#define SECTION_INFO_SEC_SIZE_SH 0
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#define SECTION_INFO_SEC_SIZE_MSK 0xffffff
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#define SECTION_INFO_SECTIONTYPE_SH 24
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#define SECTION_INFO_SECTIONTYPE_MSK 0xf
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#define SECTION_INFO_CHECKSUM BIT(28)
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#define SECTION_INFO_REDL BIT(29)
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/**
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* @addtogroup Firmware
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* @{
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* @addtogroup FW_Download
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* @{
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*/
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/**
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* @brief disable_fw_watchdog
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*
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* @param *adapter
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* @param *fw
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* @param len
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* @return Please Place Description here.
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* @retval u32
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*/
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u32 disable_fw_watchdog(struct mac_ax_adapter *adapter);
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/**
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* @}
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* @}
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*/
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/**
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* @addtogroup Firmware
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* @{
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* @addtogroup FW_Download
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* @{
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*/
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/**
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* @brief mac_fwredl
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*
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* @param *adapter
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* @param *fw
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* @param len
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* @return Please Place Description here.
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* @retval u32
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*/
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u32 mac_fwredl(struct mac_ax_adapter *adapter, u8 *fw, u32 len);
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/**
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* @}
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* @}
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*/
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/**
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* @addtogroup Firmware
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* @{
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* @addtogroup FW_Download
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* @{
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*/
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/**
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* @brief mac_fwdl
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*
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* @param *adapter
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* @param *fw
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* @param len
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* @return Please Place Description here.
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* @retval u32
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*/
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u32 mac_fwdl(struct mac_ax_adapter *adapter, u8 *fw, u32 len);
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/**
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* @}
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* @}
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*/
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/**
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* @addtogroup Firmware
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* @{
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* @addtogroup FW_Download
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* @{
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*/
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/**
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* @brief mac_enable_cpu
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*
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* @param *adapter
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* @param boot_reason
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* @param dlfw
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* @return Please Place Description here.
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* @retval u32
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*/
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u32 mac_enable_cpu(struct mac_ax_adapter *adapter, u8 boot_reason, u8 dlfw);
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/**
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* @}
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* @}
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*/
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/**
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* @addtogroup Firmware
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* @{
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* @addtogroup FW_Download
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* @{
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*/
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/**
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* @brief mac_disable_cpu
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*
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* @param *adapter
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* @return Please Place Description here.
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* @retval u32
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*/
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u32 mac_disable_cpu(struct mac_ax_adapter *adapter);
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/**
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* @}
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* @}
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*/
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/**
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* @addtogroup Firmware
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* @{
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* @addtogroup FW_Download
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* @{
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*/
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/**
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* @brief mac_romdl
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*
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* @param *adapter
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* @param *rom
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* @param romaddr
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* @param len
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* @return Please Place Description here.
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* @retval u32
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*/
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u32 mac_romdl(struct mac_ax_adapter *adapter, u8 *rom, u32 romaddr, u32 len);
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/**
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* @}
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* @}
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*/
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/**
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* @addtogroup Firmware
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* @{
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* @addtogroup FW_Download
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* @{
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*/
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/**
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* @brief mac_ram_boot
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*
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* @param *adapter
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* @param *fw
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* @param len
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* @return Please Place Description here.
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* @retval u32
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*/
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u32 mac_ram_boot(struct mac_ax_adapter *adapter, u8 *fw, u32 len);
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/**
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* @}
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* @}
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*/
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/**
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* @addtogroup Firmware
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* @{
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* @addtogroup FW_Download
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* @{
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*/
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/**
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* @brief mac_enable_fw
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*
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* @param *adapter
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* @param cat
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* @return Please Place Description here.
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* @retval u32
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*/
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u32 mac_enable_fw(struct mac_ax_adapter *adapter, enum rtw_fw_type cat);
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/**
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* @}
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* @}
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*/
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/**
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* @brief mac_query_fw_buff
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*
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* @param *adapter
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* @param cat
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* @param **fw
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* @param *fw_len
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* @return Please Place Description here.
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* @retval u32
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*/
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u32 mac_query_fw_buff(struct mac_ax_adapter *adapter, enum rtw_fw_type cat, u8 **fw, u32 *fw_len);
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/**
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* @}
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* @}
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*/
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#endif
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