/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Interface for managing mitigations for Spectre vulnerabilities.
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*
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* Copyright (C) 2020 Google LLC
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* Author: Will Deacon <will@kernel.org>
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*/
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#ifndef __ASM_SPECTRE_H
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#define __ASM_SPECTRE_H
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#define BP_HARDEN_EL2_SLOTS 4
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#define __BP_HARDEN_HYP_VECS_SZ ((BP_HARDEN_EL2_SLOTS - 1) * SZ_2K)
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#ifndef __ASSEMBLY__
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#include <linux/percpu.h>
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#include <asm/cpufeature.h>
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#include <asm/virt.h>
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/* Watch out, ordering is important here. */
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enum mitigation_state {
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SPECTRE_UNAFFECTED,
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SPECTRE_MITIGATED,
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SPECTRE_VULNERABLE,
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};
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struct task_struct;
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/*
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* Note: the order of this enum corresponds to __bp_harden_hyp_vecs and
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* we rely on having the direct vectors first.
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*/
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enum arm64_hyp_spectre_vector {
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/*
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* Take exceptions directly to __kvm_hyp_vector. This must be
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* 0 so that it used by default when mitigations are not needed.
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*/
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HYP_VECTOR_DIRECT,
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/*
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* Bounce via a slot in the hypervisor text mapping of
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* __bp_harden_hyp_vecs, which contains an SMC call.
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*/
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HYP_VECTOR_SPECTRE_DIRECT,
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/*
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* Bounce via a slot in a special mapping of __bp_harden_hyp_vecs
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* next to the idmap page.
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*/
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HYP_VECTOR_INDIRECT,
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/*
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* Bounce via a slot in a special mapping of __bp_harden_hyp_vecs
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* next to the idmap page, which contains an SMC call.
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*/
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HYP_VECTOR_SPECTRE_INDIRECT,
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};
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typedef void (*bp_hardening_cb_t)(void);
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struct bp_hardening_data {
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enum arm64_hyp_spectre_vector slot;
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bp_hardening_cb_t fn;
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};
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DECLARE_PER_CPU_READ_MOSTLY(struct bp_hardening_data, bp_hardening_data);
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/* Called during entry so must be __always_inline */
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static __always_inline void arm64_apply_bp_hardening(void)
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{
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struct bp_hardening_data *d;
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if (!cpus_have_const_cap(ARM64_SPECTRE_V2))
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return;
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d = this_cpu_ptr(&bp_hardening_data);
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if (d->fn)
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d->fn();
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}
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enum mitigation_state arm64_get_spectre_v2_state(void);
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bool has_spectre_v2(const struct arm64_cpu_capabilities *cap, int scope);
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void spectre_v2_enable_mitigation(const struct arm64_cpu_capabilities *__unused);
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bool has_spectre_v3a(const struct arm64_cpu_capabilities *cap, int scope);
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void spectre_v3a_enable_mitigation(const struct arm64_cpu_capabilities *__unused);
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enum mitigation_state arm64_get_spectre_v4_state(void);
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bool has_spectre_v4(const struct arm64_cpu_capabilities *cap, int scope);
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void spectre_v4_enable_mitigation(const struct arm64_cpu_capabilities *__unused);
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void spectre_v4_enable_task_mitigation(struct task_struct *tsk);
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enum mitigation_state arm64_get_meltdown_state(void);
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enum mitigation_state arm64_get_spectre_bhb_state(void);
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bool is_spectre_bhb_affected(const struct arm64_cpu_capabilities *entry, int scope);
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u8 spectre_bhb_loop_affected(int scope);
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void spectre_bhb_enable_mitigation(const struct arm64_cpu_capabilities *__unused);
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_SPECTRE_H */
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