/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_ARCHRANDOM_H
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#define _ASM_ARCHRANDOM_H
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#ifdef CONFIG_ARCH_RANDOM
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#include <linux/bug.h>
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#include <linux/kernel.h>
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#include <asm/cpufeature.h>
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static inline bool __arm64_rndr(unsigned long *v)
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{
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bool ok;
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/*
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* Reads of RNDR set PSTATE.NZCV to 0b0000 on success,
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* and set PSTATE.NZCV to 0b0100 otherwise.
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*/
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asm volatile(
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__mrs_s("%0", SYS_RNDR_EL0) "\n"
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" cset %w1, ne\n"
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: "=r" (*v), "=r" (ok)
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:
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: "cc");
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return ok;
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}
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static inline bool __must_check arch_get_random_long(unsigned long *v)
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{
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return false;
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}
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static inline bool __must_check arch_get_random_int(unsigned int *v)
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{
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return false;
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}
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static inline bool __must_check arch_get_random_seed_long(unsigned long *v)
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{
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/*
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* Only support the generic interface after we have detected
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* the system wide capability, avoiding complexity with the
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* cpufeature code and with potential scheduling between CPUs
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* with and without the feature.
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*/
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if (!cpus_have_const_cap(ARM64_HAS_RNG))
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return false;
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return __arm64_rndr(v);
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}
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static inline bool __must_check arch_get_random_seed_int(unsigned int *v)
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{
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unsigned long val;
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bool ok = arch_get_random_seed_long(&val);
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*v = val;
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return ok;
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}
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static inline bool __init __early_cpu_has_rndr(void)
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{
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/* Open code as we run prior to the first call to cpufeature. */
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unsigned long ftr = read_sysreg_s(SYS_ID_AA64ISAR0_EL1);
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return (ftr >> ID_AA64ISAR0_RNDR_SHIFT) & 0xf;
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}
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static inline bool __init __must_check
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arch_get_random_seed_long_early(unsigned long *v)
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{
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WARN_ON(system_state != SYSTEM_BOOTING);
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if (!__early_cpu_has_rndr())
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return false;
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return __arm64_rndr(v);
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}
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#define arch_get_random_seed_long_early arch_get_random_seed_long_early
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#endif /* CONFIG_ARCH_RANDOM */
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#endif /* _ASM_ARCHRANDOM_H */
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