/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
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*/
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#ifndef __LINUX_REG_PFUZE100_H
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#define __LINUX_REG_PFUZE100_H
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#define PFUZE100_SW1AB 0
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#define PFUZE100_SW1C 1
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#define PFUZE100_SW2 2
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#define PFUZE100_SW3A 3
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#define PFUZE100_SW3B 4
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#define PFUZE100_SW4 5
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#define PFUZE100_SWBST 6
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#define PFUZE100_VSNVS 7
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#define PFUZE100_VREFDDR 8
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#define PFUZE100_VGEN1 9
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#define PFUZE100_VGEN2 10
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#define PFUZE100_VGEN3 11
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#define PFUZE100_VGEN4 12
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#define PFUZE100_VGEN5 13
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#define PFUZE100_VGEN6 14
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#define PFUZE100_COIN 15
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#define PFUZE100_MAX_REGULATOR 16
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#define PFUZE200_SW1AB 0
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#define PFUZE200_SW2 1
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#define PFUZE200_SW3A 2
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#define PFUZE200_SW3B 3
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#define PFUZE200_SWBST 4
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#define PFUZE200_VSNVS 5
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#define PFUZE200_VREFDDR 6
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#define PFUZE200_VGEN1 7
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#define PFUZE200_VGEN2 8
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#define PFUZE200_VGEN3 9
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#define PFUZE200_VGEN4 10
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#define PFUZE200_VGEN5 11
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#define PFUZE200_VGEN6 12
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#define PFUZE200_COIN 13
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#define PFUZE3000_SW1A 0
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#define PFUZE3000_SW1B 1
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#define PFUZE3000_SW2 2
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#define PFUZE3000_SW3 3
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#define PFUZE3000_SWBST 4
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#define PFUZE3000_VSNVS 5
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#define PFUZE3000_VREFDDR 6
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#define PFUZE3000_VLDO1 7
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#define PFUZE3000_VLDO2 8
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#define PFUZE3000_VCCSD 9
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#define PFUZE3000_V33 10
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#define PFUZE3000_VLDO3 11
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#define PFUZE3000_VLDO4 12
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#define PFUZE3001_SW1 0
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#define PFUZE3001_SW2 1
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#define PFUZE3001_SW3 2
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#define PFUZE3001_VSNVS 3
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#define PFUZE3001_VLDO1 4
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#define PFUZE3001_VLDO2 5
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#define PFUZE3001_VCCSD 6
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#define PFUZE3001_V33 7
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#define PFUZE3001_VLDO3 8
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#define PFUZE3001_VLDO4 9
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struct regulator_init_data;
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struct pfuze_regulator_platform_data {
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struct regulator_init_data *init_data[PFUZE100_MAX_REGULATOR];
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};
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#endif /* __LINUX_REG_PFUZE100_H */
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